
Thao X. Le
Supervisory Patent Examiner (ID: 2525, Phone: (571)272-1708 , Office: P/2892 )
| Most Active Art Unit | 2814 |
| Art Unit(s) | 2892, 2814 |
| Total Applications | 343 |
| Issued Applications | 215 |
| Pending Applications | 14 |
| Abandoned Applications | 114 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 1336370
[patent_doc_number] => 06597012
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2003-07-22
[patent_title] => 'Organic electroluminescent device'
[patent_app_type] => B2
[patent_app_number] => 10/135379
[patent_app_country] => US
[patent_app_date] => 2002-05-01
[patent_effective_date] => 0000-00-00
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/597/06597012.pdf
[firstpage_image] =>[orig_patent_app_number] => 10135379
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/135379 | Organic electroluminescent device | Apr 30, 2002 | Issued |
Array
(
[id] => 1245624
[patent_doc_number] => 06677168
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-01-13
[patent_title] => 'Analysis of ion implant dosage'
[patent_app_type] => B1
[patent_app_number] => 10/135703
[patent_app_country] => US
[patent_app_date] => 2002-04-30
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/06/677/06677168.pdf
[firstpage_image] =>[orig_patent_app_number] => 10135703
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/135703 | Analysis of ion implant dosage | Apr 29, 2002 | Issued |
Array
(
[id] => 869643
[patent_doc_number] => 07365408
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-04-29
[patent_title] => 'Structure for photolithographic applications using a multi-layer anti-reflection coating'
[patent_app_type] => utility
[patent_app_number] => 10/135754
[patent_app_country] => US
[patent_app_date] => 2002-04-30
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/07/365/07365408.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/135754 | Structure for photolithographic applications using a multi-layer anti-reflection coating | Apr 29, 2002 | Issued |
Array
(
[id] => 5859328
[patent_doc_number] => 20020123215
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-09-05
[patent_title] => 'Process for producing barrier film and barrier film thus produced'
[patent_app_type] => new
[patent_app_number] => 10/133432
[patent_app_country] => US
[patent_app_date] => 2002-04-29
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0123/20020123215.pdf
[firstpage_image] =>[orig_patent_app_number] => 10133432
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/133432 | Process for producing barrier film and barrier film thus produced | Apr 28, 2002 | Abandoned |
Array
(
[id] => 1132605
[patent_doc_number] => 06787912
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-09-07
[patent_title] => 'Barrier material for copper structures'
[patent_app_type] => B2
[patent_app_number] => 10/132173
[patent_app_country] => US
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[firstpage_image] =>[orig_patent_app_number] => 10132173
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/132173 | Barrier material for copper structures | Apr 25, 2002 | Issued |
Array
(
[id] => 6664238
[patent_doc_number] => 20030203564
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-10-30
[patent_title] => 'METHODS OF FORMING SEMICONDUCTOR CONSTRUCTIONS'
[patent_app_type] => new
[patent_app_number] => 10/133193
[patent_app_country] => US
[patent_app_date] => 2002-04-26
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[firstpage_image] =>[orig_patent_app_number] => 10133193
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/133193 | Methods of forming isolation regions associated with semiconductor constructions | Apr 25, 2002 | Issued |
Array
(
[id] => 1105062
[patent_doc_number] => 06812163
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[patent_kind] => B2
[patent_issue_date] => 2004-11-02
[patent_title] => 'Semiconductor device with porous interlayer insulating film'
[patent_app_type] => B2
[patent_app_number] => 10/131949
[patent_app_country] => US
[patent_app_date] => 2002-04-24
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/06/812/06812163.pdf
[firstpage_image] =>[orig_patent_app_number] => 10131949
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/131949 | Semiconductor device with porous interlayer insulating film | Apr 23, 2002 | Issued |
Array
(
[id] => 1092816
[patent_doc_number] => 06825083
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-11-30
[patent_title] => 'Method for reducing shallow trench isolation edge thinning on thin gate oxides to improve peripheral transistor reliability and performance for high performance flash memory devices'
[patent_app_type] => B1
[patent_app_number] => 10/126814
[patent_app_country] => US
[patent_app_date] => 2002-04-19
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[pdf_file] => patents/06/825/06825083.pdf
[firstpage_image] =>[orig_patent_app_number] => 10126814
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/126814 | Method for reducing shallow trench isolation edge thinning on thin gate oxides to improve peripheral transistor reliability and performance for high performance flash memory devices | Apr 18, 2002 | Issued |
Array
(
[id] => 6809184
[patent_doc_number] => 20030199123
[patent_country] => US
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[patent_issue_date] => 2003-10-23
[patent_title] => 'Clock distribution networks and conductive lines in semiconductor integrated'
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[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/127144 | Clock distribution networks and conductive lines in semiconductor integrated circuits | Apr 17, 2002 | Issued |
Array
(
[id] => 1089077
[patent_doc_number] => 06828183
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-12-07
[patent_title] => 'Process for high voltage oxide and select gate poly for split-gate flash memory'
[patent_app_type] => B1
[patent_app_number] => 10/120834
[patent_app_country] => US
[patent_app_date] => 2002-04-11
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/120834 | Process for high voltage oxide and select gate poly for split-gate flash memory | Apr 10, 2002 | Issued |
Array
(
[id] => 5922078
[patent_doc_number] => 20020115286
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[patent_issue_date] => 2002-08-22
[patent_title] => 'Integrated circuit device with MIM capacitance circuit and method of manufacturing the same'
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[patent_app_number] => 10/119185
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[patent_app_date] => 2002-04-09
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/119185 | Integrated circuit device with MIM capacitance circuit and method of manufacturing the same | Apr 8, 2002 | Issued |
Array
(
[id] => 6663842
[patent_doc_number] => 20030203168
[patent_country] => US
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[patent_issue_date] => 2003-10-30
[patent_title] => 'MOLECULAR ELECTRONIC DEVICE USING METAL-METAL BONDED COMPLEXES'
[patent_app_type] => new
[patent_app_number] => 10/117789
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[firstpage_image] =>[orig_patent_app_number] => 10117789
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/117789 | Molecular electronic device using metal-metal bonded complexes | Apr 4, 2002 | Issued |
Array
(
[id] => 6157988
[patent_doc_number] => 20020146851
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[patent_title] => 'Method of forming magnetic memory'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/116634 | Method of forming magnetic memory | Apr 3, 2002 | Issued |
Array
(
[id] => 7301291
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[patent_title] => 'Semiconductor device'
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[firstpage_image] =>[orig_patent_app_number] => 10468038
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/468038 | Semiconductor device having bridge-connected wiring structure | Mar 28, 2002 | Issued |
Array
(
[id] => 968816
[patent_doc_number] => 06940092
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[patent_issue_date] => 2005-09-06
[patent_title] => 'Electrically conducting organic compound and electronic device'
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[firstpage_image] =>[orig_patent_app_number] => 10107450
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/107450 | Electrically conducting organic compound and electronic device | Mar 27, 2002 | Issued |
Array
(
[id] => 6867640
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[patent_issue_date] => 2003-05-01
[patent_title] => 'Ferroelectric capacitor and a semiconductor device'
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[firstpage_image] =>[orig_patent_app_number] => 10103894
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/103894 | Ferroelectric capacitor and a semiconductor device | Mar 24, 2002 | Issued |
Array
(
[id] => 1197707
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[patent_title] => 'P-n junction structure'
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[firstpage_image] =>[orig_patent_app_number] => 10104568
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/104568 | P-n junction structure | Mar 21, 2002 | Issued |
Array
(
[id] => 990710
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[patent_title] => 'Biased, triple-well fully depleted SOI structure, and various methods of making and operating same'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/104939 | Biased, triple-well fully depleted SOI structure, and various methods of making and operating same | Mar 20, 2002 | Issued |
Array
(
[id] => 1264541
[patent_doc_number] => 06660635
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[patent_title] => 'Pre-LDD wet clean recipe to gain channel length scaling margin beyond sub-0.1 m'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/101653 | Pre-LDD wet clean recipe to gain channel length scaling margin beyond sub-0.1 m | Mar 19, 2002 | Issued |
Array
(
[id] => 6635376
[patent_doc_number] => 20030006443
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[pdf_file] => publications/A1/0006/20030006443.pdf
[firstpage_image] =>[orig_patent_app_number] => 10101465
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/101465 | Semiconductor device having a capacitor and method for the manufacture thereof | Mar 19, 2002 | Abandoned |