
Thao X. Le
Supervisory Patent Examiner (ID: 2525, Phone: (571)272-1708 , Office: P/2892 )
| Most Active Art Unit | 2814 |
| Art Unit(s) | 2892, 2814 |
| Total Applications | 343 |
| Issued Applications | 215 |
| Pending Applications | 14 |
| Abandoned Applications | 114 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 972581
[patent_doc_number] => 06936877
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-08-30
[patent_title] => 'Integrated circuit including a capacitor with a high capacitance density'
[patent_app_type] => utility
[patent_app_number] => 10/101328
[patent_app_country] => US
[patent_app_date] => 2002-03-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 15
[patent_no_of_words] => 13206
[patent_no_of_claims] => 17
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[patent_words_short_claim] => 127
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/936/06936877.pdf
[firstpage_image] =>[orig_patent_app_number] => 10101328
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/101328 | Integrated circuit including a capacitor with a high capacitance density | Mar 18, 2002 | Issued |
Array
(
[id] => 5840319
[patent_doc_number] => 20020130372
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-09-19
[patent_title] => 'Semiconductor device having silicide thin film and method of forming the same'
[patent_app_type] => new
[patent_app_number] => 10/100929
[patent_app_country] => US
[patent_app_date] => 2002-03-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[patent_no_of_words] => 4069
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[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0130/20020130372.pdf
[firstpage_image] =>[orig_patent_app_number] => 10100929
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/100929 | Semiconductor device having silicide thin film and method of forming the same | Mar 17, 2002 | Issued |
Array
(
[id] => 1176075
[patent_doc_number] => 06750534
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-06-15
[patent_title] => 'Heat spreader hole pin 1 identifier'
[patent_app_type] => B2
[patent_app_number] => 10/099284
[patent_app_country] => US
[patent_app_date] => 2002-03-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/750/06750534.pdf
[firstpage_image] =>[orig_patent_app_number] => 10099284
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/099284 | Heat spreader hole pin 1 identifier | Mar 14, 2002 | Issued |
Array
(
[id] => 7625535
[patent_doc_number] => 06723634
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-04-20
[patent_title] => 'Method of forming interconnects with improved barrier layer adhesion'
[patent_app_type] => B1
[patent_app_number] => 10/097004
[patent_app_country] => US
[patent_app_date] => 2002-03-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 3630
[patent_no_of_claims] => 16
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/723/06723634.pdf
[firstpage_image] =>[orig_patent_app_number] => 10097004
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/097004 | Method of forming interconnects with improved barrier layer adhesion | Mar 13, 2002 | Issued |
Array
(
[id] => 6434623
[patent_doc_number] => 20020127796
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-09-12
[patent_title] => 'Method for producing a cell of a semiconductor memory'
[patent_app_type] => new
[patent_app_number] => 10/096473
[patent_app_country] => US
[patent_app_date] => 2002-03-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 2829
[patent_no_of_claims] => 9
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[patent_words_short_claim] => 219
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0127/20020127796.pdf
[firstpage_image] =>[orig_patent_app_number] => 10096473
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/096473 | Method for producing a cell of a semiconductor memory | Mar 11, 2002 | Issued |
| 10/097283 | ESD protection snapback structure for overvoltage self-protecting I/O cells | Mar 11, 2002 | Abandoned |
Array
(
[id] => 6671892
[patent_doc_number] => 20030057495
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-03-27
[patent_title] => 'P-type transparent copper-aluminum-oxide semiconductor'
[patent_app_type] => new
[patent_app_number] => 10/095163
[patent_app_country] => US
[patent_app_date] => 2002-03-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
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[patent_no_of_words] => 5432
[patent_no_of_claims] => 24
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0057/20030057495.pdf
[firstpage_image] =>[orig_patent_app_number] => 10095163
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/095163 | P-type transparent copper-aluminum-oxide semiconductor | Mar 7, 2002 | Issued |
Array
(
[id] => 5901042
[patent_doc_number] => 20020140041
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-10-03
[patent_title] => 'Semiconductor device and method for fabricating the same'
[patent_app_type] => new
[patent_app_number] => 10/092308
[patent_app_country] => US
[patent_app_date] => 2002-03-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 4699
[patent_no_of_claims] => 14
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[pdf_file] => publications/A1/0140/20020140041.pdf
[firstpage_image] =>[orig_patent_app_number] => 10092308
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/092308 | Semiconductor device having an overhanging structure and method for fabricating the same | Mar 6, 2002 | Issued |
Array
(
[id] => 7159251
[patent_doc_number] => 20040075090
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-04-22
[patent_title] => 'Modulation doped thyrisor and complementary transistors combination for a monolithic optoelectric integrated circuit'
[patent_app_type] => new
[patent_app_number] => 10/469649
[patent_app_country] => US
[patent_app_date] => 2003-08-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 8717
[patent_no_of_claims] => 23
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[pdf_file] => publications/A1/0075/20040075090.pdf
[firstpage_image] =>[orig_patent_app_number] => 10469649
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/469649 | Modulation doped thyristor and complementary transistors combination for a monolithic optoelectronic integrated circuit | Mar 3, 2002 | Issued |
Array
(
[id] => 1380036
[patent_doc_number] => 06563183
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-05-13
[patent_title] => 'Gate array with multiple dielectric properties and method for forming same'
[patent_app_type] => B1
[patent_app_number] => 10/085949
[patent_app_country] => US
[patent_app_date] => 2002-02-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[patent_no_of_words] => 5844
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[pdf_file] => patents/06/563/06563183.pdf
[firstpage_image] =>[orig_patent_app_number] => 10085949
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/085949 | Gate array with multiple dielectric properties and method for forming same | Feb 27, 2002 | Issued |
Array
(
[id] => 6704317
[patent_doc_number] => 20030151051
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-08-14
[patent_title] => 'High performance active and passive structures based on silicon material grown epitaxially or bonded to silicon carbide substrate'
[patent_app_type] => new
[patent_app_number] => 10/078588
[patent_app_country] => US
[patent_app_date] => 2002-02-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 5112
[patent_no_of_claims] => 32
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[pdf_file] => publications/A1/0151/20030151051.pdf
[firstpage_image] =>[orig_patent_app_number] => 10078588
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/078588 | High performance active and passive structures based on silicon material grown epitaxially or bonded to silicon carbide substrate | Feb 13, 2002 | Abandoned |
Array
(
[id] => 6548017
[patent_doc_number] => 20020110998
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-08-15
[patent_title] => 'Chemical vapor deposition method'
[patent_app_type] => new
[patent_app_number] => 10/073228
[patent_app_country] => US
[patent_app_date] => 2002-02-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[patent_no_of_words] => 6685
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[pdf_file] => publications/A1/0110/20020110998.pdf
[firstpage_image] =>[orig_patent_app_number] => 10073228
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/073228 | Chemical vapor deposition method | Feb 12, 2002 | Issued |
Array
(
[id] => 1332277
[patent_doc_number] => 06596592
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2003-07-22
[patent_title] => 'Structures and methods of anti-fuse formation in SOI'
[patent_app_type] => B2
[patent_app_number] => 10/066759
[patent_app_country] => US
[patent_app_date] => 2002-02-06
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/06/596/06596592.pdf
[firstpage_image] =>[orig_patent_app_number] => 10066759
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/066759 | Structures and methods of anti-fuse formation in SOI | Feb 5, 2002 | Issued |
Array
(
[id] => 1245653
[patent_doc_number] => 06677183
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-01-13
[patent_title] => 'Method of separation of semiconductor device'
[patent_app_type] => B2
[patent_app_number] => 10/059116
[patent_app_country] => US
[patent_app_date] => 2002-01-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[pdf_file] => patents/06/677/06677183.pdf
[firstpage_image] =>[orig_patent_app_number] => 10059116
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/059116 | Method of separation of semiconductor device | Jan 30, 2002 | Issued |
Array
(
[id] => 6674393
[patent_doc_number] => 20030059996
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-03-27
[patent_title] => 'Method for forming gate structure'
[patent_app_type] => new
[patent_app_number] => 10/060590
[patent_app_country] => US
[patent_app_date] => 2002-01-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[pdf_file] => publications/A1/0059/20030059996.pdf
[firstpage_image] =>[orig_patent_app_number] => 10060590
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/060590 | Method for forming gate structure | Jan 29, 2002 | Abandoned |
Array
(
[id] => 1180122
[patent_doc_number] => 06740593
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-05-25
[patent_title] => 'Semiconductor processing methods utilizing low concentrations of reactive etching components'
[patent_app_type] => B2
[patent_app_number] => 10/057578
[patent_app_country] => US
[patent_app_date] => 2002-01-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/740/06740593.pdf
[firstpage_image] =>[orig_patent_app_number] => 10057578
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/057578 | Semiconductor processing methods utilizing low concentrations of reactive etching components | Jan 24, 2002 | Issued |
Array
(
[id] => 6469050
[patent_doc_number] => 20020151094
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-10-17
[patent_title] => 'Thin film Inorganic Light Emitting Diode'
[patent_app_type] => new
[patent_app_number] => 10/054243
[patent_app_country] => US
[patent_app_date] => 2002-01-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
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[patent_no_of_claims] => 13
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0151/20020151094.pdf
[firstpage_image] =>[orig_patent_app_number] => 10054243
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/054243 | Thin film inorganic light emitting diode | Jan 23, 2002 | Issued |
Array
(
[id] => 6170995
[patent_doc_number] => 20020153830
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-10-24
[patent_title] => 'Manufacturing of a thin film inorganic light emitting diode'
[patent_app_type] => new
[patent_app_number] => 10/050667
[patent_app_country] => US
[patent_app_date] => 2002-01-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[pdf_file] => publications/A1/0153/20020153830.pdf
[firstpage_image] =>[orig_patent_app_number] => 10050667
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/050667 | Manufacturing of a thin film inorganic light emitting diode | Jan 15, 2002 | Issued |
Array
(
[id] => 6656046
[patent_doc_number] => 20030132522
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-07-17
[patent_title] => 'TiW platinum interconnect and method of making the same'
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[patent_app_number] => 10/044009
[patent_app_country] => US
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[pdf_file] => publications/A1/0132/20030132522.pdf
[firstpage_image] =>[orig_patent_app_number] => 10044009
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/044009 | TiW platinum interconnect and method of making the same | Jan 10, 2002 | Issued |
Array
(
[id] => 6284978
[patent_doc_number] => 20020053707
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-05-09
[patent_title] => 'Semiconductor device having improved bias dependability and method of fabricating same'
[patent_app_type] => new
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[patent_app_country] => US
[patent_app_date] => 2002-01-11
[patent_effective_date] => 0000-00-00
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0053/20020053707.pdf
[firstpage_image] =>[orig_patent_app_number] => 10043466
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/043466 | Semiconductor device having improved bias dependability and method of fabricating same | Jan 10, 2002 | Abandoned |