Search

Theodore C. Parsons

Examiner (ID: 12791, Phone: (571)270-1475 , Office: P/2494 )

Most Active Art Unit
2494
Art Unit(s)
2494
Total Applications
531
Issued Applications
401
Pending Applications
57
Abandoned Applications
103

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11645062 [patent_doc_number] => 09666453 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-05-30 [patent_title] => 'Semiconductor package and a substrate for packaging' [patent_app_type] => utility [patent_app_number] => 13/546281 [patent_app_country] => US [patent_app_date] => 2012-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 2446 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13546281 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/546281
Semiconductor package and a substrate for packaging Jul 10, 2012 Issued
Array ( [id] => 8610199 [patent_doc_number] => 20130015511 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-01-17 [patent_title] => 'SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/546322 [patent_app_country] => US [patent_app_date] => 2012-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 4675 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13546322 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/546322
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE Jul 10, 2012 Abandoned
Array ( [id] => 8610234 [patent_doc_number] => 20130015546 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-01-17 [patent_title] => 'MULTI-LAYER PHOTOELECTRIC INTEGRATED CIRCUIT DEVICE WITH OVERLAPPING DEVICES' [patent_app_type] => utility [patent_app_number] => 13/546363 [patent_app_country] => US [patent_app_date] => 2012-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7570 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13546363 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/546363
MULTI-LAYER PHOTOELECTRIC INTEGRATED CIRCUIT DEVICE WITH OVERLAPPING DEVICES Jul 10, 2012 Abandoned
Array ( [id] => 9220273 [patent_doc_number] => 20140015048 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-16 [patent_title] => 'FinFET with Trench Field Plate' [patent_app_type] => utility [patent_app_number] => 13/546738 [patent_app_country] => US [patent_app_date] => 2012-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 2488 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13546738 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/546738
FinFET with trench field plate Jul 10, 2012 Issued
Array ( [id] => 10118717 [patent_doc_number] => 09153605 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-10-06 [patent_title] => 'Thin film transistor array substrate, organic light emitting display device comprising the same, and method of manufacturing the thin film transistor array substrate' [patent_app_type] => utility [patent_app_number] => 13/535963 [patent_app_country] => US [patent_app_date] => 2012-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 7386 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13535963 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/535963
Thin film transistor array substrate, organic light emitting display device comprising the same, and method of manufacturing the thin film transistor array substrate Jun 27, 2012 Issued
Array ( [id] => 8450895 [patent_doc_number] => 20120261841 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-10-18 [patent_title] => 'Article and Panel Comprising Semiconductor Chips, Casting Mold and Methods of Producing the Same' [patent_app_type] => utility [patent_app_number] => 13/533566 [patent_app_country] => US [patent_app_date] => 2012-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3758 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13533566 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/533566
Article and panel comprising semiconductor chips, casting mold and methods of producing the same Jun 25, 2012 Issued
Array ( [id] => 10073772 [patent_doc_number] => 09112139 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-08-18 [patent_title] => 'Spin transistor and memory' [patent_app_type] => utility [patent_app_number] => 13/526007 [patent_app_country] => US [patent_app_date] => 2012-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 16 [patent_no_of_words] => 6981 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13526007 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/526007
Spin transistor and memory Jun 17, 2012 Issued
Array ( [id] => 8430294 [patent_doc_number] => 20120252169 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-10-04 [patent_title] => 'REDISTRIBUTED CHIP PACKAGING WITH THERMAL CONTACT TO DEVICE BACKSIDE' [patent_app_type] => utility [patent_app_number] => 13/517842 [patent_app_country] => US [patent_app_date] => 2012-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3761 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13517842 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/517842
REDISTRIBUTED CHIP PACKAGING WITH THERMAL CONTACT TO DEVICE BACKSIDE Jun 13, 2012 Abandoned
Array ( [id] => 8777310 [patent_doc_number] => 20130099285 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-04-25 [patent_title] => 'HIGH ELECTRON MOBILITY TRANSISTOR HAVING REDUCED THRESHOLD VOLTAGE VARIATION AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/517815 [patent_app_country] => US [patent_app_date] => 2012-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 8183 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13517815 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/517815
High electron mobility transistor having reduced threshold voltage variation and method of manufacturing the same Jun 13, 2012 Issued
Array ( [id] => 9158840 [patent_doc_number] => 20130307117 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-11-21 [patent_title] => 'Structure and Method for Inductors Integrated into Semiconductor Device Packages' [patent_app_type] => utility [patent_app_number] => 13/475439 [patent_app_country] => US [patent_app_date] => 2012-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5443 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13475439 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/475439
Structure and Method for Inductors Integrated into Semiconductor Device Packages May 17, 2012 Abandoned
Array ( [id] => 8414424 [patent_doc_number] => 20120241924 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-09-27 [patent_title] => 'SEMICONDUCTOR DEVICE HAVING ANTENNA AND METHOD FOR MANUFACTURING THEREOF' [patent_app_type] => utility [patent_app_number] => 13/468354 [patent_app_country] => US [patent_app_date] => 2012-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 12891 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13468354 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/468354
Semiconductor device having antenna and method for manufacturing thereof May 9, 2012 Issued
Array ( [id] => 8368263 [patent_doc_number] => 20120217657 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-30 [patent_title] => 'MULTI-CHIP MODULE PACKAGE' [patent_app_type] => utility [patent_app_number] => 13/468862 [patent_app_country] => US [patent_app_date] => 2012-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3565 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13468862 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/468862
MULTI-CHIP MODULE PACKAGE May 9, 2012 Abandoned
Array ( [id] => 9118275 [patent_doc_number] => 20130285197 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-31 [patent_title] => 'Semiconductor Devices and Methods of Manufacturing and Using Thereof' [patent_app_type] => utility [patent_app_number] => 13/458848 [patent_app_country] => US [patent_app_date] => 2012-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 8179 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13458848 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/458848
Semiconductor Devices and Methods of Manufacturing and Using Thereof Apr 26, 2012 Abandoned
Array ( [id] => 8310439 [patent_doc_number] => 20120187463 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-26 [patent_title] => 'CMOS IMAGE SENSORS INCLUDING BACKSIDE ILLUMINATION STRUCTURE AND METHOD OF MANUFACTURING IMAGE SENSOR' [patent_app_type] => utility [patent_app_number] => 13/438340 [patent_app_country] => US [patent_app_date] => 2012-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4293 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13438340 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/438340
CMOS image sensors including backside illumination structure and method of manufacturing image sensor Apr 2, 2012 Issued
Array ( [id] => 9582177 [patent_doc_number] => 08772180 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-08 [patent_title] => 'Interconnect structure and method of making same' [patent_app_type] => utility [patent_app_number] => 13/415159 [patent_app_country] => US [patent_app_date] => 2012-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 3380 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13415159 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/415159
Interconnect structure and method of making same Mar 7, 2012 Issued
Array ( [id] => 8807722 [patent_doc_number] => 08445374 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-05-21 [patent_title] => 'Soft error rate mitigation by interconnect structure' [patent_app_type] => utility [patent_app_number] => 13/361057 [patent_app_country] => US [patent_app_date] => 2012-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 3430 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13361057 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/361057
Soft error rate mitigation by interconnect structure Jan 29, 2012 Issued
Array ( [id] => 10604207 [patent_doc_number] => 09324778 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-04-26 [patent_title] => 'Variable inductor and semiconductor device using same' [patent_app_type] => utility [patent_app_number] => 13/814871 [patent_app_country] => US [patent_app_date] => 2012-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 7984 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13814871 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/814871
Variable inductor and semiconductor device using same Jan 25, 2012 Issued
Array ( [id] => 8185436 [patent_doc_number] => 20120115278 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-10 [patent_title] => 'STACKED SEMICONDUCTOR PACKAGE WITHOUT REDUCTION IN DATA STORAGE CAPACITY AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/347965 [patent_app_country] => US [patent_app_date] => 2012-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 5312 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0115/20120115278.pdf [firstpage_image] =>[orig_patent_app_number] => 13347965 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/347965
STACKED SEMICONDUCTOR PACKAGE WITHOUT REDUCTION IN DATA STORAGE CAPACITY AND METHOD FOR MANUFACTURING THE SAME Jan 10, 2012 Abandoned
Array ( [id] => 9594733 [patent_doc_number] => 20140191410 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-10 [patent_title] => 'DAMAGE MONITOR STRUCTURE FOR THROUGH-SILICON VIA (TSV) ARRAYS' [patent_app_type] => utility [patent_app_number] => 13/977595 [patent_app_country] => US [patent_app_date] => 2011-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4447 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13977595 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/977595
DAMAGE MONITOR STRUCTURE FOR THROUGH-SILICON VIA (TSV) ARRAYS Dec 26, 2011 Abandoned
Array ( [id] => 10010426 [patent_doc_number] => 09053951 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-06-09 [patent_title] => 'Massively parallel interconnect fabric for complex semiconductor devices' [patent_app_type] => utility [patent_app_number] => 13/329266 [patent_app_country] => US [patent_app_date] => 2011-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 31 [patent_no_of_words] => 8784 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 249 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13329266 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/329266
Massively parallel interconnect fabric for complex semiconductor devices Dec 16, 2011 Issued
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