
Theresa T. Doan
Examiner (ID: 9173)
| Most Active Art Unit | 2814 |
| Art Unit(s) | 2814 |
| Total Applications | 1974 |
| Issued Applications | 1714 |
| Pending Applications | 87 |
| Abandoned Applications | 202 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 17551806
[patent_doc_number] => 20220123148
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-04-21
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/563238
[patent_app_country] => US
[patent_app_date] => 2021-12-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 20017
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -12
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17563238
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/563238 | Semiconductor device | Dec 27, 2021 | Issued |
Array
(
[id] => 18456259
[patent_doc_number] => 20230197541
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-06-22
[patent_title] => GLASS VIAS AND PLANES WITH REDUCED TAPERING
[patent_app_type] => utility
[patent_app_number] => 17/557913
[patent_app_country] => US
[patent_app_date] => 2021-12-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7410
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -21
[patent_words_short_claim] => 43
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17557913
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/557913 | GLASS VIAS AND PLANES WITH REDUCED TAPERING | Dec 20, 2021 | Pending |
Array
(
[id] => 18456259
[patent_doc_number] => 20230197541
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-06-22
[patent_title] => GLASS VIAS AND PLANES WITH REDUCED TAPERING
[patent_app_type] => utility
[patent_app_number] => 17/557913
[patent_app_country] => US
[patent_app_date] => 2021-12-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7410
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -21
[patent_words_short_claim] => 43
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17557913
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/557913 | GLASS VIAS AND PLANES WITH REDUCED TAPERING | Dec 20, 2021 | Pending |
Array
(
[id] => 18608275
[patent_doc_number] => 11749754
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-09-05
[patent_title] => Active pattern structure and semiconductor device including the same
[patent_app_type] => utility
[patent_app_number] => 17/550712
[patent_app_country] => US
[patent_app_date] => 2021-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 32
[patent_no_of_words] => 6070
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 133
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17550712
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/550712 | Active pattern structure and semiconductor device including the same | Dec 13, 2021 | Issued |
Array
(
[id] => 19108770
[patent_doc_number] => 11961884
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-04-16
[patent_title] => Fill structures with air gaps
[patent_app_type] => utility
[patent_app_number] => 17/549049
[patent_app_country] => US
[patent_app_date] => 2021-12-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 24
[patent_no_of_words] => 7465
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 141
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17549049
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/549049 | Fill structures with air gaps | Dec 12, 2021 | Issued |
Array
(
[id] => 17477658
[patent_doc_number] => 20220085162
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-03-17
[patent_title] => METHOD FOR FORMING MULTI-GATE SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/532681
[patent_app_country] => US
[patent_app_date] => 2021-11-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10040
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 71
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17532681
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/532681 | Method for forming multi-gate semiconductor device | Nov 21, 2021 | Issued |
Array
(
[id] => 18339006
[patent_doc_number] => 20230130955
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-04-27
[patent_title] => LATERAL DIFFUSED METAL OXIDE SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/533056
[patent_app_country] => US
[patent_app_date] => 2021-11-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4357
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 74
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17533056
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/533056 | Lateral diffused metal oxide semiconductor device | Nov 21, 2021 | Issued |
Array
(
[id] => 17630901
[patent_doc_number] => 20220165916
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-05-26
[patent_title] => LIGHT-EMITTING ELEMENT AND ELECTRONIC DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/455708
[patent_app_country] => US
[patent_app_date] => 2021-11-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9374
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 173
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17455708
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/455708 | Light-emitting element and electronic device | Nov 18, 2021 | Issued |
Array
(
[id] => 18381910
[patent_doc_number] => 20230157001
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-05-18
[patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/455668
[patent_app_country] => US
[patent_app_date] => 2021-11-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5115
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 85
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17455668
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/455668 | Semiconductor device and method of fabricating the same | Nov 17, 2021 | Issued |
Array
(
[id] => 17463911
[patent_doc_number] => 20220077217
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-03-10
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/525968
[patent_app_country] => US
[patent_app_date] => 2021-11-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4436
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 53
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17525968
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/525968 | Semiconductor device | Nov 14, 2021 | Issued |
Array
(
[id] => 19704883
[patent_doc_number] => 12198930
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-01-14
[patent_title] => Method for manufacturing semiconductor device
[patent_app_type] => utility
[patent_app_number] => 17/630674
[patent_app_country] => US
[patent_app_date] => 2021-11-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 13
[patent_no_of_words] => 5797
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 123
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17630674
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/630674 | Method for manufacturing semiconductor device | Nov 11, 2021 | Issued |
Array
(
[id] => 17780254
[patent_doc_number] => 20220246604
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-08-04
[patent_title] => CAPACITOR INTEGRATED IN FINFET DEVICE AND METHOD FOR FABRICATING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/520527
[patent_app_country] => US
[patent_app_date] => 2021-11-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5462
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -14
[patent_words_short_claim] => 363
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17520527
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/520527 | Capacitor integrated in FinFET device and method for fabricating the same | Nov 4, 2021 | Issued |
Array
(
[id] => 19093911
[patent_doc_number] => 11955376
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-04-09
[patent_title] => Etch damage and ESL free dual damascene metal interconnect
[patent_app_type] => utility
[patent_app_number] => 17/518885
[patent_app_country] => US
[patent_app_date] => 2021-11-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 15
[patent_no_of_words] => 4449
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 145
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17518885
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/518885 | Etch damage and ESL free dual damascene metal interconnect | Nov 3, 2021 | Issued |
Array
(
[id] => 18767082
[patent_doc_number] => 11817496
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-11-14
[patent_title] => High voltage semiconductor device
[patent_app_type] => utility
[patent_app_number] => 17/515573
[patent_app_country] => US
[patent_app_date] => 2021-11-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 7011
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 171
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17515573
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/515573 | High voltage semiconductor device | Oct 31, 2021 | Issued |
Array
(
[id] => 17417121
[patent_doc_number] => 20220052025
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-02-17
[patent_title] => Semiconductor Device and Method of Forming Embedded Die Substrate, and System-in-Package Modules with the Same
[patent_app_type] => utility
[patent_app_number] => 17/452824
[patent_app_country] => US
[patent_app_date] => 2021-10-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8273
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -21
[patent_words_short_claim] => 34
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17452824
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/452824 | Semiconductor device and method of forming embedded die substrate, and system-in-package modules with the same | Oct 28, 2021 | Issued |
Array
(
[id] => 17403160
[patent_doc_number] => 20220045251
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-02-10
[patent_title] => LIGHT EMITTING DEVICE, METHOD OF MANUFACTURING LIGHT EMITTING DEVICE, AND LIGHTING TOOL FOR VEHICLE
[patent_app_type] => utility
[patent_app_number] => 17/452433
[patent_app_country] => US
[patent_app_date] => 2021-10-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 16872
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 152
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17452433
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/452433 | Light emitting device, method of manufacturing light emitting device, and lighting tool for vehicle | Oct 26, 2021 | Issued |
Array
(
[id] => 17986268
[patent_doc_number] => 20220352305
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-11-03
[patent_title] => MANUFACTURING METHOD OF SEMICONDUCTOR STRUCTURE AND SEMICONDUCTOR STRUCTURE
[patent_app_type] => utility
[patent_app_number] => 17/452160
[patent_app_country] => US
[patent_app_date] => 2021-10-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6405
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -12
[patent_words_short_claim] => 47
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17452160
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/452160 | Manufacturing method of semiconductor structure and semiconductor structure | Oct 24, 2021 | Issued |
Array
(
[id] => 18263127
[patent_doc_number] => 11610836
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-03-21
[patent_title] => Method of fabricating semiconductor device
[patent_app_type] => utility
[patent_app_number] => 17/510337
[patent_app_country] => US
[patent_app_date] => 2021-10-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 4321
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 165
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17510337
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/510337 | Method of fabricating semiconductor device | Oct 24, 2021 | Issued |
Array
(
[id] => 18952508
[patent_doc_number] => 11895826
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-02-06
[patent_title] => Method for preparing semiconductor device structure with air gap
[patent_app_type] => utility
[patent_app_number] => 17/503662
[patent_app_country] => US
[patent_app_date] => 2021-10-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 7311
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 172
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17503662
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/503662 | Method for preparing semiconductor device structure with air gap | Oct 17, 2021 | Issued |
Array
(
[id] => 17509386
[patent_doc_number] => 20220102489
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-03-31
[patent_title] => SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 17/502461
[patent_app_country] => US
[patent_app_date] => 2021-10-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7008
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 112
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17502461
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/502461 | Semiconductor structure and manufacturing method thereof | Oct 14, 2021 | Issued |