Search

Theresa T. Doan

Examiner (ID: 9173)

Most Active Art Unit
2814
Art Unit(s)
2814
Total Applications
1974
Issued Applications
1714
Pending Applications
87
Abandoned Applications
202

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17048258 [patent_doc_number] => 11101449 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-24 [patent_title] => Organic light-emitting display device [patent_app_type] => utility [patent_app_number] => 16/783074 [patent_app_country] => US [patent_app_date] => 2020-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7561 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16783074 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/783074
Organic light-emitting display device Feb 4, 2020 Issued
Array ( [id] => 17210781 [patent_doc_number] => 11171158 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-09 [patent_title] => SOI substrate compatible with the RFSOI and FDSOI technologies [patent_app_type] => utility [patent_app_number] => 16/774143 [patent_app_country] => US [patent_app_date] => 2020-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 6078 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16774143 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/774143
SOI substrate compatible with the RFSOI and FDSOI technologies Jan 27, 2020 Issued
Array ( [id] => 15906213 [patent_doc_number] => 20200152627 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-14 [patent_title] => SYSTEM ON CHIP [patent_app_type] => utility [patent_app_number] => 16/746071 [patent_app_country] => US [patent_app_date] => 2020-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8588 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16746071 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/746071
System on chip Jan 16, 2020 Issued
Array ( [id] => 17421122 [patent_doc_number] => 11254561 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-02-22 [patent_title] => Pressure sensor encapsulated in elastomeric material, and system including the pressure sensor [patent_app_type] => utility [patent_app_number] => 16/730480 [patent_app_country] => US [patent_app_date] => 2019-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 14 [patent_no_of_words] => 6490 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16730480 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/730480
Pressure sensor encapsulated in elastomeric material, and system including the pressure sensor Dec 29, 2019 Issued
Array ( [id] => 15873293 [patent_doc_number] => 20200144050 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-07 [patent_title] => Lattice-Mismatched Semiconductor Substrates with Defect Reduction [patent_app_type] => utility [patent_app_number] => 16/728393 [patent_app_country] => US [patent_app_date] => 2019-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6633 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16728393 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/728393
Lattice-mismatched semiconductor substrates with defect reduction Dec 26, 2019 Issued
Array ( [id] => 17971340 [patent_doc_number] => 11488888 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-01 [patent_title] => Chemical vapor deposition diamond (CVDD) wires for thermal transport [patent_app_type] => utility [patent_app_number] => 16/726747 [patent_app_country] => US [patent_app_date] => 2019-12-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 36 [patent_no_of_words] => 6748 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16726747 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/726747
Chemical vapor deposition diamond (CVDD) wires for thermal transport Dec 23, 2019 Issued
Array ( [id] => 16081317 [patent_doc_number] => 20200194645 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-18 [patent_title] => LIGHT EMITTING DEVICE, METHOD OF MANUFACTURING LIGHT EMITTING DEVICE, AND LIGHTING TOOL FOR VEHICLE [patent_app_type] => utility [patent_app_number] => 16/713256 [patent_app_country] => US [patent_app_date] => 2019-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16862 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16713256 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/713256
Light emitting device, method of manufacturing light emitting device, and lighting tool for vehicle Dec 12, 2019 Issued
Array ( [id] => 16970335 [patent_doc_number] => 11066294 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-07-20 [patent_title] => Micro-electro-mechanical actuator device of piezoelectric type and apparatus integrating the micro-electro-mechanical actuator device [patent_app_type] => utility [patent_app_number] => 16/705522 [patent_app_country] => US [patent_app_date] => 2019-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 5671 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16705522 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/705522
Micro-electro-mechanical actuator device of piezoelectric type and apparatus integrating the micro-electro-mechanical actuator device Dec 5, 2019 Issued
Array ( [id] => 15688255 [patent_doc_number] => 20200098791 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-26 [patent_title] => FULLY DEPLETED SEMICONDUCTOR-ON-INSULATOR TRANSISTORS WITH DIFFERENT BURIED DIELECTRIC LAYER CHARGES AND DIFFERENT THRESHOLD VOLTAGES [patent_app_type] => utility [patent_app_number] => 16/691734 [patent_app_country] => US [patent_app_date] => 2019-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6172 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16691734 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/691734
Fully depleted semiconductor-on-insulator transistors with different buried dielectric layer charges and different threshold voltages Nov 21, 2019 Issued
Array ( [id] => 15688255 [patent_doc_number] => 20200098791 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-26 [patent_title] => FULLY DEPLETED SEMICONDUCTOR-ON-INSULATOR TRANSISTORS WITH DIFFERENT BURIED DIELECTRIC LAYER CHARGES AND DIFFERENT THRESHOLD VOLTAGES [patent_app_type] => utility [patent_app_number] => 16/691734 [patent_app_country] => US [patent_app_date] => 2019-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6172 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16691734 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/691734
Fully depleted semiconductor-on-insulator transistors with different buried dielectric layer charges and different threshold voltages Nov 21, 2019 Issued
Array ( [id] => 17247036 [patent_doc_number] => 20210366781 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-25 [patent_title] => METHOD OF MANUFACTURING INVERTER AND INVERTER [patent_app_type] => utility [patent_app_number] => 16/626352 [patent_app_country] => US [patent_app_date] => 2019-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3963 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16626352 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/626352
Method of manufacturing inverter and inverter Nov 20, 2019 Issued
Array ( [id] => 15625285 [patent_doc_number] => 20200083047 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-12 [patent_title] => INTEGRATION OF DEVICE REGIONS [patent_app_type] => utility [patent_app_number] => 16/687529 [patent_app_country] => US [patent_app_date] => 2019-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6176 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16687529 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/687529
Integration of device regions Nov 17, 2019 Issued
Array ( [id] => 17470280 [patent_doc_number] => 11276763 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-15 [patent_title] => Contacts for highly scaled transistors [patent_app_type] => utility [patent_app_number] => 16/681927 [patent_app_country] => US [patent_app_date] => 2019-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 52 [patent_no_of_words] => 10235 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16681927 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/681927
Contacts for highly scaled transistors Nov 12, 2019 Issued
Array ( [id] => 16827802 [patent_doc_number] => 20210143095 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-13 [patent_title] => FEOL INTERCONNECT USED AS CAPACITANCE OVER FINS INSTEAD OF GATES [patent_app_type] => utility [patent_app_number] => 16/681869 [patent_app_country] => US [patent_app_date] => 2019-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6480 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16681869 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/681869
FEOL interconnect used as capacitance over fins instead of gates Nov 12, 2019 Issued
Array ( [id] => 15625845 [patent_doc_number] => 20200083327 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-12 [patent_title] => MULTI-GATE SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 16/681097 [patent_app_country] => US [patent_app_date] => 2019-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9824 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16681097 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/681097
Multi-gate semiconductor device Nov 11, 2019 Issued
Array ( [id] => 16911499 [patent_doc_number] => 11043549 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-22 [patent_title] => Flexible display device and method of manufacturing the same [patent_app_type] => utility [patent_app_number] => 16/680132 [patent_app_country] => US [patent_app_date] => 2019-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 18 [patent_no_of_words] => 7833 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16680132 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/680132
Flexible display device and method of manufacturing the same Nov 10, 2019 Issued
Array ( [id] => 15598485 [patent_doc_number] => 20200075777 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-05 [patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/678820 [patent_app_country] => US [patent_app_date] => 2019-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7805 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16678820 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/678820
Semiconductor device and manufacturing method thereof Nov 7, 2019 Issued
Array ( [id] => 15598483 [patent_doc_number] => 20200075776 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-05 [patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/678808 [patent_app_country] => US [patent_app_date] => 2019-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7766 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16678808 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/678808
Semiconductor device and manufacturing method thereof Nov 7, 2019 Issued
Array ( [id] => 15564927 [patent_doc_number] => 20200066875 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-27 [patent_title] => STACKED VERTICAL TRANSPORT FIELD EFFECT TRANSISTOR ELECTRICALLY ERASABLE PROGRAMMABLE READ ONLY MEMORY (EEPROM) DEVICES [patent_app_type] => utility [patent_app_number] => 16/671951 [patent_app_country] => US [patent_app_date] => 2019-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10159 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16671951 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/671951
Stacked vertical transport field effect transistor electrically erasable programmable read only memory (EEPROM) devices Oct 31, 2019 Issued
Array ( [id] => 15564925 [patent_doc_number] => 20200066874 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-27 [patent_title] => STACKED VERTICAL TRANSPORT FIELD EFFECT TRANSISTOR ELECTRICALLY ERASABLE PROGRAMMABLE READ ONLY MEMORY (EEPROM) DEVICES [patent_app_type] => utility [patent_app_number] => 16/671844 [patent_app_country] => US [patent_app_date] => 2019-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10160 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16671844 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/671844
Stacked vertical transport field effect transistor electrically erasable programmable read only memory (EEPROM) devices Oct 31, 2019 Issued
Menu