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Theresa T. Doan

Examiner (ID: 9173)

Most Active Art Unit
2814
Art Unit(s)
2814
Total Applications
1974
Issued Applications
1714
Pending Applications
87
Abandoned Applications
202

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 15807479 [patent_doc_number] => 20200126882 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-23 [patent_title] => SEMICONDUCTOR PACKAGE [patent_app_type] => utility [patent_app_number] => 16/507974 [patent_app_country] => US [patent_app_date] => 2019-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3075 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16507974 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/507974
Semiconductor package Jul 9, 2019 Issued
Array ( [id] => 17002597 [patent_doc_number] => 11081420 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-03 [patent_title] => Substrate structure and semiconductor package structure [patent_app_type] => utility [patent_app_number] => 16/508210 [patent_app_country] => US [patent_app_date] => 2019-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 8120 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16508210 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/508210
Substrate structure and semiconductor package structure Jul 9, 2019 Issued
Array ( [id] => 16566863 [patent_doc_number] => 10892239 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-01-12 [patent_title] => Bond pad reliability of semiconductor devices [patent_app_type] => utility [patent_app_number] => 16/508288 [patent_app_country] => US [patent_app_date] => 2019-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 3796 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16508288 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/508288
Bond pad reliability of semiconductor devices Jul 9, 2019 Issued
Array ( [id] => 17152618 [patent_doc_number] => 11145709 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-10-12 [patent_title] => Semiconductor device including a capacitor [patent_app_type] => utility [patent_app_number] => 16/439636 [patent_app_country] => US [patent_app_date] => 2019-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 8432 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16439636 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/439636
Semiconductor device including a capacitor Jun 11, 2019 Issued
Array ( [id] => 16516024 [patent_doc_number] => 20200395282 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-17 [patent_title] => VIAS FOR PACKAGE SUBSTRATES [patent_app_type] => utility [patent_app_number] => 16/437420 [patent_app_country] => US [patent_app_date] => 2019-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8768 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16437420 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/437420
Vias for package substrates Jun 10, 2019 Issued
Array ( [id] => 17210664 [patent_doc_number] => 11171041 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-09 [patent_title] => Etch damage and ESL free dual damascene metal interconnect [patent_app_type] => utility [patent_app_number] => 16/426074 [patent_app_country] => US [patent_app_date] => 2019-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 15 [patent_no_of_words] => 4423 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16426074 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/426074
Etch damage and ESL free dual damascene metal interconnect May 29, 2019 Issued
Array ( [id] => 16471848 [patent_doc_number] => 20200373386 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-26 [patent_title] => SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/419021 [patent_app_country] => US [patent_app_date] => 2019-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2817 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16419021 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/419021
Semiconductor structure and manufacturing method thereof May 21, 2019 Issued
Array ( [id] => 16502713 [patent_doc_number] => 10868114 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-15 [patent_title] => Isolation structures of semiconductor devices [patent_app_type] => utility [patent_app_number] => 16/419077 [patent_app_country] => US [patent_app_date] => 2019-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 48 [patent_no_of_words] => 13885 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16419077 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/419077
Isolation structures of semiconductor devices May 21, 2019 Issued
Array ( [id] => 15873663 [patent_doc_number] => 20200144235 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-07 [patent_title] => SEMICONDUCTOR PACKAGE [patent_app_type] => utility [patent_app_number] => 16/418885 [patent_app_country] => US [patent_app_date] => 2019-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11070 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -30 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16418885 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/418885
Semiconductor package May 20, 2019 Issued
Array ( [id] => 16372449 [patent_doc_number] => 10804215 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-13 [patent_title] => Semiconductor package [patent_app_type] => utility [patent_app_number] => 16/418876 [patent_app_country] => US [patent_app_date] => 2019-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 21 [patent_no_of_words] => 11403 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16418876 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/418876
Semiconductor package May 20, 2019 Issued
Array ( [id] => 15922279 [patent_doc_number] => 10658388 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-19 [patent_title] => Methods of forming stacked SOI semiconductor devices with back bias mechanism [patent_app_type] => utility [patent_app_number] => 16/414203 [patent_app_country] => US [patent_app_date] => 2019-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 9112 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16414203 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/414203
Methods of forming stacked SOI semiconductor devices with back bias mechanism May 15, 2019 Issued
Array ( [id] => 17224798 [patent_doc_number] => 11177308 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-16 [patent_title] => CMOS sensors and methods of forming the same [patent_app_type] => utility [patent_app_number] => 16/403638 [patent_app_country] => US [patent_app_date] => 2019-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 4112 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16403638 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/403638
CMOS sensors and methods of forming the same May 5, 2019 Issued
Array ( [id] => 14746355 [patent_doc_number] => 20190256351 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-22 [patent_title] => Membrane Components and Method for Forming a Membrane Component [patent_app_type] => utility [patent_app_number] => 16/402632 [patent_app_country] => US [patent_app_date] => 2019-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13487 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16402632 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/402632
Membrane components and method for forming a membrane component May 2, 2019 Issued
Array ( [id] => 16609467 [patent_doc_number] => 10910483 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-02 [patent_title] => Fin diode structure and methods thereof [patent_app_type] => utility [patent_app_number] => 16/397880 [patent_app_country] => US [patent_app_date] => 2019-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 25 [patent_no_of_words] => 9086 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16397880 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/397880
Fin diode structure and methods thereof Apr 28, 2019 Issued
Array ( [id] => 14746345 [patent_doc_number] => 20190256346 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-22 [patent_title] => SEMICONDUCTOR MEMS STRUCTURE [patent_app_type] => utility [patent_app_number] => 16/397418 [patent_app_country] => US [patent_app_date] => 2019-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5345 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16397418 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/397418
Semiconductor MEMS structure Apr 28, 2019 Issued
Array ( [id] => 14753349 [patent_doc_number] => 20190259848 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-22 [patent_title] => SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/396621 [patent_app_country] => US [patent_app_date] => 2019-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6718 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16396621 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/396621
Semiconductor device and fabrication method thereof Apr 25, 2019 Issued
Array ( [id] => 16233963 [patent_doc_number] => 10741527 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-11 [patent_title] => Memory device [patent_app_type] => utility [patent_app_number] => 16/390639 [patent_app_country] => US [patent_app_date] => 2019-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 44 [patent_no_of_words] => 9586 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16390639 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/390639
Memory device Apr 21, 2019 Issued
Array ( [id] => 14722507 [patent_doc_number] => 20190252317 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-15 [patent_title] => SEMICONDUCTOR STRUCTURE WITH ULTRA THICK METAL AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/389500 [patent_app_country] => US [patent_app_date] => 2019-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7687 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16389500 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/389500
Semiconductor structure with ultra thick metal and manufacturing method thereof Apr 18, 2019 Issued
Array ( [id] => 16973646 [patent_doc_number] => 11069626 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-07-20 [patent_title] => Molding compound and semiconductor package with a molding compound [patent_app_type] => utility [patent_app_number] => 16/385337 [patent_app_country] => US [patent_app_date] => 2019-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 4456 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 37 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16385337 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/385337
Molding compound and semiconductor package with a molding compound Apr 15, 2019 Issued
Array ( [id] => 16637916 [patent_doc_number] => 10916431 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-09 [patent_title] => Robust gate cap for protecting a gate from downstream metallization etch operations [patent_app_type] => utility [patent_app_number] => 16/385668 [patent_app_country] => US [patent_app_date] => 2019-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 5522 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16385668 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/385668
Robust gate cap for protecting a gate from downstream metallization etch operations Apr 15, 2019 Issued
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