Search

Theresa T. Doan

Examiner (ID: 9173)

Most Active Art Unit
2814
Art Unit(s)
2814
Total Applications
1974
Issued Applications
1714
Pending Applications
87
Abandoned Applications
202

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 14985293 [patent_doc_number] => 10446568 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-15 [patent_title] => Semiconductor memory and semiconductor memory manufacturing method [patent_app_type] => utility [patent_app_number] => 16/188403 [patent_app_country] => US [patent_app_date] => 2018-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 25 [patent_no_of_words] => 7299 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16188403 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/188403
Semiconductor memory and semiconductor memory manufacturing method Nov 12, 2018 Issued
Array ( [id] => 16067663 [patent_doc_number] => 10692795 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-23 [patent_title] => Flip chip assembly of quantum computing devices [patent_app_type] => utility [patent_app_number] => 16/188466 [patent_app_country] => US [patent_app_date] => 2018-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 9390 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16188466 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/188466
Flip chip assembly of quantum computing devices Nov 12, 2018 Issued
Array ( [id] => 16873723 [patent_doc_number] => 20210167190 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-03 [patent_title] => SEMICONDUCTOR DEVICE, AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/771168 [patent_app_country] => US [patent_app_date] => 2018-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6361 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16771168 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/771168
Semiconductor device, and manufacturing method thereof Nov 12, 2018 Issued
Array ( [id] => 16502508 [patent_doc_number] => 10867903 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-15 [patent_title] => Semiconductor package and method of forming the same [patent_app_type] => utility [patent_app_number] => 16/186096 [patent_app_country] => US [patent_app_date] => 2018-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 5770 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16186096 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/186096
Semiconductor package and method of forming the same Nov 8, 2018 Issued
Array ( [id] => 15906051 [patent_doc_number] => 20200152546 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-14 [patent_title] => ELECTRONIC DEVICE APPARATUS WITH MULTIPLE THERMALLY CONDUCTIVE PATHS FOR HEAT DISSIPATION [patent_app_type] => utility [patent_app_number] => 16/186178 [patent_app_country] => US [patent_app_date] => 2018-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11455 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16186178 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/186178
Electronic device apparatus with multiple thermally conductive paths for heat dissipation Nov 8, 2018 Issued
Array ( [id] => 15717735 [patent_doc_number] => 20200105635 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-02 [patent_title] => Integrated Circuit Package and Method [patent_app_type] => utility [patent_app_number] => 16/185849 [patent_app_country] => US [patent_app_date] => 2018-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12651 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16185849 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/185849
Integrated circuit package and method Nov 8, 2018 Issued
Array ( [id] => 15331823 [patent_doc_number] => 20200006241 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-02 [patent_title] => Semiconductor Device and Method of Manufacture [patent_app_type] => utility [patent_app_number] => 16/185861 [patent_app_country] => US [patent_app_date] => 2018-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12705 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16185861 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/185861
Semiconductor device and method of manufacture Nov 8, 2018 Issued
Array ( [id] => 14164329 [patent_doc_number] => 20190109267 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-11 [patent_title] => LIGHT EMITTING DEVICE PACKAGE AND LIGHT UNIT INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 16/178219 [patent_app_country] => US [patent_app_date] => 2018-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10912 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 576 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16178219 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/178219
Light emitting device package and light unit including the same Oct 31, 2018 Issued
Array ( [id] => 15611561 [patent_doc_number] => 10586852 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-10 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 16/156062 [patent_app_country] => US [patent_app_date] => 2018-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 9982 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16156062 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/156062
Semiconductor device Oct 9, 2018 Issued
Array ( [id] => 17908673 [patent_doc_number] => 11462536 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-10-04 [patent_title] => Integrated circuit structures having asymmetric source and drain structures [patent_app_type] => utility [patent_app_number] => 16/147538 [patent_app_country] => US [patent_app_date] => 2018-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 43 [patent_no_of_words] => 19915 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16147538 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/147538
Integrated circuit structures having asymmetric source and drain structures Sep 27, 2018 Issued
Array ( [id] => 13909433 [patent_doc_number] => 20190043921 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-07 [patent_title] => MAGNETORESISTIVE DEVICE DESIGN AND PROCESS INTEGRATION WITH SURROUNDING CIRCUITRY [patent_app_type] => utility [patent_app_number] => 16/143088 [patent_app_country] => US [patent_app_date] => 2018-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6107 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16143088 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/143088
Magnetoresistive device design and process integration with surrounding circuitry Sep 25, 2018 Issued
Array ( [id] => 15688429 [patent_doc_number] => 20200098878 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-26 [patent_title] => SELF-ALIGNED GATE ENDCAP (SAGE) ARCHITECTURES WITH GATE-ALL-AROUND DEVICES HAVING EPITAXIAL SOURCE OR DRAIN STRUCTURES [patent_app_type] => utility [patent_app_number] => 16/139252 [patent_app_country] => US [patent_app_date] => 2018-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15242 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16139252 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/139252
Self-aligned gate endcap (SAGE) architectures with gate-all-around devices having epitaxial source or drain structures Sep 23, 2018 Issued
Array ( [id] => 14875427 [patent_doc_number] => 20190287955 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-19 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 16/126018 [patent_app_country] => US [patent_app_date] => 2018-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6008 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16126018 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/126018
Semiconductor device and method of manufacturing the same Sep 9, 2018 Issued
Array ( [id] => 15078039 [patent_doc_number] => 10468520 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-05 [patent_title] => Switching element and method of manufacturing the same [patent_app_type] => utility [patent_app_number] => 16/126220 [patent_app_country] => US [patent_app_date] => 2018-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 9022 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 264 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16126220 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/126220
Switching element and method of manufacturing the same Sep 9, 2018 Issued
Array ( [id] => 14843573 [patent_doc_number] => 20190280187 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-12 [patent_title] => SEMICONDUCTOR STORAGE DEVICE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 16/126349 [patent_app_country] => US [patent_app_date] => 2018-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7603 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16126349 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/126349
Semiconductor storage device and method of manufacturing the same Sep 9, 2018 Issued
Array ( [id] => 14722485 [patent_doc_number] => 20190252306 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-15 [patent_title] => PRINTED CIRCUIT BOARD AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 16/126221 [patent_app_country] => US [patent_app_date] => 2018-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8594 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16126221 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/126221
Printed circuit board and semiconductor package including the same Sep 9, 2018 Issued
Array ( [id] => 15791583 [patent_doc_number] => 10629523 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-04-21 [patent_title] => Via-based vertical capacitor and resistor structures [patent_app_type] => utility [patent_app_number] => 16/126406 [patent_app_country] => US [patent_app_date] => 2018-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 7715 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16126406 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/126406
Via-based vertical capacitor and resistor structures Sep 9, 2018 Issued
Array ( [id] => 14691537 [patent_doc_number] => 20190244884 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-08 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/126430 [patent_app_country] => US [patent_app_date] => 2018-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4023 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16126430 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/126430
Semiconductor device Sep 9, 2018 Issued
Array ( [id] => 15625697 [patent_doc_number] => 20200083253 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-12 [patent_title] => FULLY DEPLETED SEMICONDUCTOR-ON-INSULATOR TRANSISTORS WITH DIFFERENT BURIED DIELECTRIC LAYER CHARGES AND DIFFERENT THRESHOLD VOLTAGES [patent_app_type] => utility [patent_app_number] => 16/126212 [patent_app_country] => US [patent_app_date] => 2018-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6143 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16126212 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/126212
Fully depleted semiconductor-on-insulator transistors with different buried dielectric layer charges and different threshold voltages Sep 9, 2018 Issued
Array ( [id] => 14573321 [patent_doc_number] => 20190214268 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-11 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/126055 [patent_app_country] => US [patent_app_date] => 2018-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18112 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16126055 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/126055
Semiconductor device Sep 9, 2018 Issued
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