Search

Theresa T. Doan

Examiner (ID: 9173)

Most Active Art Unit
2814
Art Unit(s)
2814
Total Applications
1974
Issued Applications
1714
Pending Applications
87
Abandoned Applications
202

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 14079749 [patent_doc_number] => 20190088762 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-21 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 15/706456 [patent_app_country] => US [patent_app_date] => 2017-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7436 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15706456 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/706456
Semiconductor device and method for manufacturing the same Sep 14, 2017 Issued
Array ( [id] => 13420065 [patent_doc_number] => 20180261575 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-09-13 [patent_title] => MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 15/706017 [patent_app_country] => US [patent_app_date] => 2017-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9570 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15706017 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/706017
Memory device Sep 14, 2017 Issued
Array ( [id] => 14526039 [patent_doc_number] => 10340290 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-02 [patent_title] => Stacked SOI semiconductor devices with back bias mechanism [patent_app_type] => utility [patent_app_number] => 15/706048 [patent_app_country] => US [patent_app_date] => 2017-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 8544 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15706048 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/706048
Stacked SOI semiconductor devices with back bias mechanism Sep 14, 2017 Issued
Array ( [id] => 13043335 [patent_doc_number] => 10043808 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-08-07 [patent_title] => Semiconductor memory [patent_app_type] => utility [patent_app_number] => 15/705457 [patent_app_country] => US [patent_app_date] => 2017-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 36 [patent_no_of_words] => 15164 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15705457 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/705457
Semiconductor memory Sep 14, 2017 Issued
Array ( [id] => 13112107 [patent_doc_number] => 10074713 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-09-11 [patent_title] => Signal isolator integrated circuit package [patent_app_type] => utility [patent_app_number] => 15/705487 [patent_app_country] => US [patent_app_date] => 2017-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 9250 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15705487 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/705487
Signal isolator integrated circuit package Sep 14, 2017 Issued
Array ( [id] => 13740987 [patent_doc_number] => 20180374963 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-27 [patent_title] => TRANSCAP DEVICE ARCHITECTURE WITH REDUCED CONTROL VOLTAGE AND IMPROVED QUALITY FACTOR [patent_app_type] => utility [patent_app_number] => 15/706352 [patent_app_country] => US [patent_app_date] => 2017-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6328 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15706352 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/706352
Transcap device architecture with reduced control voltage and improved quality factor Sep 14, 2017 Issued
Array ( [id] => 12779629 [patent_doc_number] => 20180151711 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-31 [patent_title] => SEMICONDUCTOR DEVICE, RC-IGBT, AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 15/706403 [patent_app_country] => US [patent_app_date] => 2017-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10863 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 316 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15706403 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/706403
Semiconductor device, RC-IGBT, and method of manufacturing semiconductor device Sep 14, 2017 Issued
Array ( [id] => 12574161 [patent_doc_number] => 10020315 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-07-10 [patent_title] => Semiconductor memory device [patent_app_type] => utility [patent_app_number] => 15/705514 [patent_app_country] => US [patent_app_date] => 2017-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 6346 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 431 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15705514 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/705514
Semiconductor memory device Sep 14, 2017 Issued
Array ( [id] => 12263936 [patent_doc_number] => 20180083132 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-22 [patent_title] => 'Semiconductor Device' [patent_app_type] => utility [patent_app_number] => 15/706263 [patent_app_country] => US [patent_app_date] => 2017-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 8928 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15706263 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/706263
Semiconductor device Sep 14, 2017 Issued
Array ( [id] => 13598083 [patent_doc_number] => 20180350590 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-06 [patent_title] => Lattice-Mismatched Semiconductor Substrates With Defect Reduction [patent_app_type] => utility [patent_app_number] => 15/704992 [patent_app_country] => US [patent_app_date] => 2017-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6609 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15704992 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/704992
Lattice-mismatched semiconductor substrates with defect reduction Sep 13, 2017 Issued
Array ( [id] => 13724131 [patent_doc_number] => 20170373021 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-12-28 [patent_title] => SEMICONDUCTOR DEVICE INCLUDING SEMICONDUCTOR CHIPS MOUNTED OVER BOTH SURFACES OF SUBSTRATE [patent_app_type] => utility [patent_app_number] => 15/699703 [patent_app_country] => US [patent_app_date] => 2017-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7640 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15699703 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/699703
Semiconductor device including semiconductor chips mounted over both surfaces of substrate Sep 7, 2017 Issued
Array ( [id] => 14252939 [patent_doc_number] => 10276678 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-30 [patent_title] => Semiconductor device and fabrication method thereof [patent_app_type] => utility [patent_app_number] => 15/693849 [patent_app_country] => US [patent_app_date] => 2017-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 6703 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15693849 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/693849
Semiconductor device and fabrication method thereof Aug 31, 2017 Issued
Array ( [id] => 12223547 [patent_doc_number] => 20180061908 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-01 [patent_title] => 'DISPLAY DEVICE' [patent_app_type] => utility [patent_app_number] => 15/684785 [patent_app_country] => US [patent_app_date] => 2017-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 10906 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15684785 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/684785
Display device Aug 22, 2017 Issued
Array ( [id] => 14875223 [patent_doc_number] => 20190287853 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-19 [patent_title] => THROUGH ELECTRODE SUBSTRATE, METHOD OF MANUFACTURING THROUGH ELECTRODE SUBSTRATE, AND MOUNTING SUBSTRATE [patent_app_type] => utility [patent_app_number] => 16/325911 [patent_app_country] => US [patent_app_date] => 2017-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16467 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16325911 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/325911
Through electrode substrate, method of manufacturing through electrode substrate, and mounting substrate Aug 20, 2017 Issued
Array ( [id] => 13121795 [patent_doc_number] => 10079254 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-09-18 [patent_title] => Chip scale package and related methods [patent_app_type] => utility [patent_app_number] => 15/674738 [patent_app_country] => US [patent_app_date] => 2017-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 20 [patent_no_of_words] => 2925 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15674738 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/674738
Chip scale package and related methods Aug 10, 2017 Issued
Array ( [id] => 13174145 [patent_doc_number] => 10103197 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-10-16 [patent_title] => Magnetoresistive device design and process integration with surrounding circuitry [patent_app_type] => utility [patent_app_number] => 15/650203 [patent_app_country] => US [patent_app_date] => 2017-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6107 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15650203 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/650203
Magnetoresistive device design and process integration with surrounding circuitry Jul 13, 2017 Issued
Array ( [id] => 12005392 [patent_doc_number] => 20170309547 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-10-26 [patent_title] => 'METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 15/643903 [patent_app_country] => US [patent_app_date] => 2017-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 15392 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15643903 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/643903
METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR DEVICE Jul 6, 2017 Abandoned
Array ( [id] => 11983956 [patent_doc_number] => 20170288111 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-10-05 [patent_title] => 'LIGHT EMITTING DEVICE PACKAGE AND LIGHT UNIT INCLUDING THE SAME' [patent_app_type] => utility [patent_app_number] => 15/631784 [patent_app_country] => US [patent_app_date] => 2017-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 11071 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15631784 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/631784
Light emitting device package and light unit including the same Jun 22, 2017 Issued
Array ( [id] => 12026920 [patent_doc_number] => 20170317020 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-02 [patent_title] => 'APPARTUS AND METHODS FOR MULTI-DIE PACKAGING' [patent_app_type] => utility [patent_app_number] => 15/630633 [patent_app_country] => US [patent_app_date] => 2017-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3200 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15630633 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/630633
Apparatus and methods for multi-die packaging Jun 21, 2017 Issued
Array ( [id] => 15969507 [patent_doc_number] => 20200168505 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-28 [patent_title] => Semiconductor Chip, Method of Producing a Semiconductor Chip and Apparatus Having a Plurality of Semiconductor Chips [patent_app_type] => utility [patent_app_number] => 16/078995 [patent_app_country] => US [patent_app_date] => 2017-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6409 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16078995 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/078995
Semiconductor chip, method of producing a semiconductor chip and apparatus having a plurality of semiconductor chips Jun 20, 2017 Issued
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