
Theresa T. Doan
Examiner (ID: 9173)
| Most Active Art Unit | 2814 |
| Art Unit(s) | 2814 |
| Total Applications | 1974 |
| Issued Applications | 1714 |
| Pending Applications | 87 |
| Abandoned Applications | 202 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 10837845
[patent_doc_number] => 08865517
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-10-21
[patent_title] => 'Method for manufacturing thin-film transistor active device and thin-film transistor active device manufactured with same'
[patent_app_type] => utility
[patent_app_number] => 13/806740
[patent_app_country] => US
[patent_app_date] => 2012-10-12
[patent_effective_date] => 0000-00-00
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[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13806740
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/806740 | Method for manufacturing thin-film transistor active device and thin-film transistor active device manufactured with same | Oct 11, 2012 | Issued |
Array
(
[id] => 8708099
[patent_doc_number] => 20130065388
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-03-14
[patent_title] => 'SUBSTRATE STRUCTURE WITH COMPLIANT BUMP AND MANUFACTURING METHOD THEREOF'
[patent_app_type] => utility
[patent_app_number] => 13/644882
[patent_app_country] => US
[patent_app_date] => 2012-10-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[patent_no_of_words] => 1782
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13644882
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/644882 | Substrate structure with compliant bump and manufacturing method thereof | Oct 3, 2012 | Issued |
Array
(
[id] => 9266685
[patent_doc_number] => 20140021601
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-01-23
[patent_title] => 'SEMICONDUCTOR MANUFACTURING METHOD AND SEMICONDUCTOR STRUCTURE THEREOF'
[patent_app_type] => utility
[patent_app_number] => 13/644749
[patent_app_country] => US
[patent_app_date] => 2012-10-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 2314
[patent_no_of_claims] => 16
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13644749
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/644749 | Semiconductor manufacturing method and semiconductor structure thereof | Oct 3, 2012 | Issued |
Array
(
[id] => 9971675
[patent_doc_number] => 09018690
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-04-28
[patent_title] => 'Split-gate memory cell with substrate stressor region, and method of making same'
[patent_app_type] => utility
[patent_app_number] => 13/631490
[patent_app_country] => US
[patent_app_date] => 2012-09-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 16
[patent_no_of_words] => 3257
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[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13631490
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/631490 | Split-gate memory cell with substrate stressor region, and method of making same | Sep 27, 2012 | Issued |
Array
(
[id] => 10066632
[patent_doc_number] => 09105490
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-08-11
[patent_title] => 'Contact structure of semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 13/629109
[patent_app_country] => US
[patent_app_date] => 2012-09-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
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[patent_no_of_words] => 5081
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[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13629109
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/629109 | Contact structure of semiconductor device | Sep 26, 2012 | Issued |
Array
(
[id] => 8914036
[patent_doc_number] => 20130175661
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-07-11
[patent_title] => 'Integrated Circuit Having Back Gating, Improved Isolation And Reduced Well Resistance And Method To Fabricate Same'
[patent_app_type] => utility
[patent_app_number] => 13/623198
[patent_app_country] => US
[patent_app_date] => 2012-09-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 5563
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13623198
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/623198 | Integrated Circuit Having Back Gating, Improved Isolation And Reduced Well Resistance And Method To Fabricate Same | Sep 19, 2012 | Abandoned |
Array
(
[id] => 8733226
[patent_doc_number] => 20130078795
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-03-28
[patent_title] => 'ETCH STOP LAYER FOR MEMORY CELL RELIABILITY IMPROVEMENT'
[patent_app_type] => utility
[patent_app_number] => 13/617291
[patent_app_country] => US
[patent_app_date] => 2012-09-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[patent_no_of_words] => 2297
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13617291
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/617291 | Etch stop layer for memory cell reliability improvement | Sep 13, 2012 | Issued |
Array
(
[id] => 8880811
[patent_doc_number] => 20130153995
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-06-20
[patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 13/607449
[patent_app_country] => US
[patent_app_date] => 2012-09-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
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[patent_no_of_words] => 5835
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13607449
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/607449 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME | Sep 6, 2012 | Abandoned |
Array
(
[id] => 9099511
[patent_doc_number] => 08563385
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-10-22
[patent_title] => 'Field effect transistor device with raised active regions'
[patent_app_type] => utility
[patent_app_number] => 13/606382
[patent_app_country] => US
[patent_app_date] => 2012-09-07
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[patent_drawing_sheets_cnt] => 4
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/606382 | Field effect transistor device with raised active regions | Sep 6, 2012 | Issued |
Array
(
[id] => 9132033
[patent_doc_number] => 20130292746
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-11-07
[patent_title] => 'DIVOT-FREE PLANARIZATION DIELECTRIC LAYER FOR REPLACEMENT GATE'
[patent_app_type] => utility
[patent_app_number] => 13/606706
[patent_app_country] => US
[patent_app_date] => 2012-09-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13606706
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/606706 | DIVOT-FREE PLANARIZATION DIELECTRIC LAYER FOR REPLACEMENT GATE | Sep 6, 2012 | Abandoned |
Array
(
[id] => 9844971
[patent_doc_number] => 08946891
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2015-02-03
[patent_title] => 'Mushroom shaped bump on repassivation'
[patent_app_type] => utility
[patent_app_number] => 13/603039
[patent_app_country] => US
[patent_app_date] => 2012-09-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
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[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13603039
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/603039 | Mushroom shaped bump on repassivation | Sep 3, 2012 | Issued |
Array
(
[id] => 8694846
[patent_doc_number] => 20130056855
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-03-07
[patent_title] => 'METHOD OF MANUFACTURING IC COMPRISING A BIPOLAR TRANSISTOR AND IC'
[patent_app_type] => utility
[patent_app_number] => 13/599389
[patent_app_country] => US
[patent_app_date] => 2012-08-30
[patent_effective_date] => 0000-00-00
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13599389
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/599389 | Method of manufacturing IC comprising a bipolar transistor and IC | Aug 29, 2012 | Issued |
Array
(
[id] => 9937324
[patent_doc_number] => 08987131
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-03-24
[patent_title] => 'Formation of through-silicon via (TSV) in silicon substrate'
[patent_app_type] => utility
[patent_app_number] => 13/597948
[patent_app_country] => US
[patent_app_date] => 2012-08-29
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/597948 | Formation of through-silicon via (TSV) in silicon substrate | Aug 28, 2012 | Issued |
Array
(
[id] => 9626423
[patent_doc_number] => 08796102
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2014-08-05
[patent_title] => 'Device structure for a RRAM and method'
[patent_app_type] => utility
[patent_app_number] => 13/598550
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/598550 | Device structure for a RRAM and method | Aug 28, 2012 | Issued |
Array
(
[id] => 9334942
[patent_doc_number] => 20140061724
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-03-06
[patent_title] => 'High Electron Mobility Transistor and Manufacturing Method Thereof'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/597599 | High electron mobility transistor and manufacturing method thereof | Aug 28, 2012 | Issued |
Array
(
[id] => 8680712
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[patent_issue_date] => 2013-02-28
[patent_title] => 'DISPLAY DEVICE AND MANUFACTURING PROCESS OF DISPLAY DEVICE'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/596089 | Display device and manufacturing process of display device | Aug 27, 2012 | Issued |
Array
(
[id] => 9468843
[patent_doc_number] => 08722474
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[patent_issue_date] => 2014-05-13
[patent_title] => 'Semiconductor device including stepped gate electrode and fabrication method thereof'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/592589 | Semiconductor device including stepped gate electrode and fabrication method thereof | Aug 22, 2012 | Issued |
Array
(
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[patent_issue_date] => 2014-08-19
[patent_title] => 'MOS with recessed lightly-doped drain'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/587059 | MOS with recessed lightly-doped drain | Aug 15, 2012 | Issued |
Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/586272 | Method for manufacturing a transistor of a semiconductor memory device | Aug 14, 2012 | Issued |
Array
(
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[patent_title] => 'Light emitting diode array'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/584689 | Light emitting diode array | Aug 12, 2012 | Issued |