Search

Thien D. Tran

Examiner (ID: 15022)

Most Active Art Unit
2665
Art Unit(s)
2665, 2616, 2662, 2861, 2853
Total Applications
421
Issued Applications
352
Pending Applications
39
Abandoned Applications
30

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19007977 [patent_doc_number] => 20240072048 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-29 [patent_title] => INTEGRATED CIRCUIT DEVICE INCLUDING INTEGRATED INSULATOR AND METHODS OF FABRICATION THE SAME [patent_app_type] => utility [patent_app_number] => 18/184901 [patent_app_country] => US [patent_app_date] => 2023-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5538 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18184901 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/184901
INTEGRATED CIRCUIT DEVICE INCLUDING INTEGRATED INSULATOR AND METHODS OF FABRICATION THE SAME Mar 15, 2023 Pending
Array ( [id] => 19269663 [patent_doc_number] => 20240213368 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-27 [patent_title] => SEMICONDUCTOR DEVICE AND THE MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/163889 [patent_app_country] => US [patent_app_date] => 2023-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3598 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18163889 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/163889
SEMICONDUCTOR DEVICE AND THE MANUFACTURING METHOD THEREOF Feb 2, 2023 Pending
Array ( [id] => 19086424 [patent_doc_number] => 20240113225 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-04 [patent_title] => SEMICONDUCTOR DEVICE AND FABRICATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/152157 [patent_app_country] => US [patent_app_date] => 2023-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6769 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18152157 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/152157
SEMICONDUCTOR DEVICE AND FABRICATING METHOD THEREOF Jan 9, 2023 Pending
Array ( [id] => 20457461 [patent_doc_number] => 12520533 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-06 [patent_title] => Transistor device and gate structure [patent_app_type] => utility [patent_app_number] => 18/046974 [patent_app_country] => US [patent_app_date] => 2022-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 25 [patent_no_of_words] => 2219 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18046974 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/046974
Transistor device and gate structure Oct 16, 2022 Issued
Array ( [id] => 18306424 [patent_doc_number] => 20230110324 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-13 [patent_title] => OPTICAL DEVICES WITH LATERAL CURRENT INJECTION [patent_app_type] => utility [patent_app_number] => 18/045683 [patent_app_country] => US [patent_app_date] => 2022-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18941 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -29 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18045683 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/045683
OPTICAL DEVICES WITH LATERAL CURRENT INJECTION Oct 10, 2022 Pending
Array ( [id] => 18323761 [patent_doc_number] => 20230121889 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-20 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/955709 [patent_app_country] => US [patent_app_date] => 2022-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9781 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17955709 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/955709
Semiconductor device and method of manufacturing the same Sep 28, 2022 Issued
Array ( [id] => 19007760 [patent_doc_number] => 20240071831 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-29 [patent_title] => SOURCE AND DRAIN REGIONS FOR LATERALLY ADJACENT GATE-ALL-AROUND (GAA) PMOS AND NMOS [patent_app_type] => utility [patent_app_number] => 17/896813 [patent_app_country] => US [patent_app_date] => 2022-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15449 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17896813 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/896813
SOURCE AND DRAIN REGIONS FOR LATERALLY ADJACENT GATE-ALL-AROUND (GAA) PMOS AND NMOS Aug 25, 2022 Pending
Array ( [id] => 20260539 [patent_doc_number] => 12432910 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-30 [patent_title] => Electrically programmable fuse over lateral bipolar transistor [patent_app_type] => utility [patent_app_number] => 17/895156 [patent_app_country] => US [patent_app_date] => 2022-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 0 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17895156 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/895156
Electrically programmable fuse over lateral bipolar transistor Aug 24, 2022 Issued
Array ( [id] => 18379722 [patent_doc_number] => 20230154811 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-18 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/819874 [patent_app_country] => US [patent_app_date] => 2022-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4400 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17819874 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/819874
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE Aug 14, 2022 Pending
Array ( [id] => 20030867 [patent_doc_number] => 20250169089 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-22 [patent_title] => METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE AND PLASMA PROCESSING METHOD [patent_app_type] => utility [patent_app_number] => 18/279809 [patent_app_country] => US [patent_app_date] => 2022-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12912 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 246 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18279809 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/279809
METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE AND PLASMA PROCESSING METHOD Aug 8, 2022 Pending
Array ( [id] => 18226982 [patent_doc_number] => 20230065976 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-02 [patent_title] => ISOLATION TRENCH STRUCTURE OF BACKSIDE ILLUMINATED CMOS IMAGE SENSOR AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/880280 [patent_app_country] => US [patent_app_date] => 2022-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6177 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 393 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17880280 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/880280
ISOLATION TRENCH STRUCTURE OF BACKSIDE ILLUMINATED CMOS IMAGE SENSOR AND METHOD FOR MANUFACTURING THE SAME Aug 2, 2022 Pending
Array ( [id] => 18097710 [patent_doc_number] => 20220416051 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-29 [patent_title] => TWO-DIMENSIONAL SEMICONDUCTOR-METAL OHMIC-CONTACT STRUCTURE, PREPARATION METHOD THEREFOR AND USE THEREOF [patent_app_type] => utility [patent_app_number] => 17/880311 [patent_app_country] => US [patent_app_date] => 2022-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5214 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 24 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17880311 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/880311
TWO-DIMENSIONAL SEMICONDUCTOR-METAL OHMIC-CONTACT STRUCTURE, PREPARATION METHOD THEREFOR AND USE THEREOF Aug 2, 2022 Pending
Array ( [id] => 18159619 [patent_doc_number] => 20230026211 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-26 [patent_title] => SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/814828 [patent_app_country] => US [patent_app_date] => 2022-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9479 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17814828 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/814828
SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME Jul 24, 2022 Pending
Array ( [id] => 18238796 [patent_doc_number] => 20230071107 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-09 [patent_title] => DISPLAY APPARATUS [patent_app_type] => utility [patent_app_number] => 17/871550 [patent_app_country] => US [patent_app_date] => 2022-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11248 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17871550 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/871550
DISPLAY APPARATUS Jul 21, 2022 Pending
Array ( [id] => 18866138 [patent_doc_number] => 20230420575 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-28 [patent_title] => METHODS OF FORMING UNIFORMLY DOPED DEEP IMPLANTED REGIONS IN SILICON CARBIDE AND SILICON CARBIDE LAYERS INCLUDING UNIFORMLY DOPED IMPLANTED REGIONS [patent_app_type] => utility [patent_app_number] => 17/849037 [patent_app_country] => US [patent_app_date] => 2022-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6897 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -35 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17849037 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/849037
METHODS OF FORMING UNIFORMLY DOPED DEEP IMPLANTED REGIONS IN SILICON CARBIDE AND SILICON CARBIDE LAYERS INCLUDING UNIFORMLY DOPED IMPLANTED REGIONS Jun 23, 2022 Pending
Array ( [id] => 18182704 [patent_doc_number] => 20230043434 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-09 [patent_title] => SEMICONDUCTOR DEVICE MANUFACTURING METHOD [patent_app_type] => utility [patent_app_number] => 17/844732 [patent_app_country] => US [patent_app_date] => 2022-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5846 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17844732 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/844732
SEMICONDUCTOR DEVICE MANUFACTURING METHOD Jun 20, 2022 Pending
Array ( [id] => 18833832 [patent_doc_number] => 20230402359 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-14 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF FORMING REDISTRIBUTION STRUCTURES OF CONDUCTIVE ELEMENTS [patent_app_type] => utility [patent_app_number] => 17/835776 [patent_app_country] => US [patent_app_date] => 2022-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9982 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17835776 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/835776
SEMICONDUCTOR DEVICE AND METHOD OF FORMING REDISTRIBUTION STRUCTURES OF CONDUCTIVE ELEMENTS Jun 7, 2022 Pending
Array ( [id] => 17870837 [patent_doc_number] => 20220293574 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-15 [patent_title] => LED CHIP MODULE AND METHOD FOR MANUFACTURING LED CHIP MODULE [patent_app_type] => utility [patent_app_number] => 17/830747 [patent_app_country] => US [patent_app_date] => 2022-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16193 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17830747 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/830747
LED CHIP MODULE AND METHOD FOR MANUFACTURING LED CHIP MODULE Jun 1, 2022 Pending
Array ( [id] => 18729398 [patent_doc_number] => 20230343694 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-26 [patent_title] => PACKAGING STRUCTURE WITH EMBEDDED POWER CHIP AND CIRCUIT BOARD MODULE HAVING THE SAME [patent_app_type] => utility [patent_app_number] => 17/824025 [patent_app_country] => US [patent_app_date] => 2022-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3126 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17824025 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/824025
Packaging structure with embedded power chip and circuit board module having the same May 24, 2022 Issued
Array ( [id] => 18789235 [patent_doc_number] => 20230377879 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-23 [patent_title] => BARRIER LAYER FOR PREVENTING ALUMINUM DIFFUSION [patent_app_type] => utility [patent_app_number] => 17/747978 [patent_app_country] => US [patent_app_date] => 2022-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9138 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17747978 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/747978
BARRIER LAYER FOR PREVENTING ALUMINUM DIFFUSION May 17, 2022 Pending
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