Search

Thien Dang Nguyen

Examiner (ID: 2181, Phone: (571)272-9189 , Office: P/2117 )

Most Active Art Unit
2111
Art Unit(s)
2111, 2117
Total Applications
814
Issued Applications
675
Pending Applications
59
Abandoned Applications
90

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18688918 [patent_doc_number] => 11784668 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-10 [patent_title] => Decoding fec codewords using ldpc codes define by a parity check matrix which is defined by rpc and qc constraints [patent_app_type] => utility [patent_app_number] => 17/666066 [patent_app_country] => US [patent_app_date] => 2022-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 22 [patent_no_of_words] => 9998 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 321 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17666066 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/666066
Decoding fec codewords using ldpc codes define by a parity check matrix which is defined by rpc and qc constraints Feb 6, 2022 Issued
Array ( [id] => 18797485 [patent_doc_number] => 11831331 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-28 [patent_title] => Transmitter and segmentation method thereof [patent_app_type] => utility [patent_app_number] => 17/583458 [patent_app_country] => US [patent_app_date] => 2022-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 30682 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17583458 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/583458
Transmitter and segmentation method thereof Jan 24, 2022 Issued
Array ( [id] => 18670610 [patent_doc_number] => 11777528 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-03 [patent_title] => System and method for processing control information [patent_app_type] => utility [patent_app_number] => 17/584244 [patent_app_country] => US [patent_app_date] => 2022-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 13365 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17584244 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/584244
System and method for processing control information Jan 24, 2022 Issued
Array ( [id] => 18209033 [patent_doc_number] => 20230055293 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-23 [patent_title] => POST ERROR CORRECTION CODE REGISTERS FOR CACHE METADATA [patent_app_type] => utility [patent_app_number] => 17/648404 [patent_app_country] => US [patent_app_date] => 2022-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17798 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17648404 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/648404
Post error correction code registers for cache metadata Jan 18, 2022 Issued
Array ( [id] => 18804147 [patent_doc_number] => 11837310 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-05 [patent_title] => Memory device for correcting pulse duty and memory system including the same [patent_app_type] => utility [patent_app_number] => 17/569144 [patent_app_country] => US [patent_app_date] => 2022-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 13329 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17569144 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/569144
Memory device for correcting pulse duty and memory system including the same Jan 4, 2022 Issued
Array ( [id] => 19405702 [patent_doc_number] => 20240289213 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-29 [patent_title] => SYSTEM, METHOD AND APPARATUS FOR REDUCING POWER CONSUMPTION OF ERROR CORRECTION CODING USING COMPACTED DATA BLOCKS [patent_app_type] => utility [patent_app_number] => 18/572226 [patent_app_country] => US [patent_app_date] => 2022-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9598 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18572226 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/572226
System, method and apparatus for reducing power consumption of error correction coding using compacted data blocks Dec 16, 2021 Issued
Array ( [id] => 18527140 [patent_doc_number] => 11714130 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-01 [patent_title] => Error rate measuring apparatus and error distribution display method [patent_app_type] => utility [patent_app_number] => 17/552608 [patent_app_country] => US [patent_app_date] => 2021-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 8124 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17552608 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/552608
Error rate measuring apparatus and error distribution display method Dec 15, 2021 Issued
Array ( [id] => 18858171 [patent_doc_number] => 11855772 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-26 [patent_title] => High throughput polar ECC decoding via compressed successive cancellation algorithm [patent_app_type] => utility [patent_app_number] => 17/551780 [patent_app_country] => US [patent_app_date] => 2021-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 10071 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17551780 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/551780
High throughput polar ECC decoding via compressed successive cancellation algorithm Dec 14, 2021 Issued
Array ( [id] => 18670611 [patent_doc_number] => 11777529 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-03 [patent_title] => Binned feedback from receiving device to network encoder [patent_app_type] => utility [patent_app_number] => 17/644243 [patent_app_country] => US [patent_app_date] => 2021-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 14928 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17644243 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/644243
Binned feedback from receiving device to network encoder Dec 13, 2021 Issued
Array ( [id] => 18438844 [patent_doc_number] => 20230186139 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-15 [patent_title] => APPARATUS AND METHOD FOR ERROR REDUCTION IN DISTRIBUTED QUANTUM SYSTEMS VIA FUSING-AND-DECOMPOSING GATES [patent_app_type] => utility [patent_app_number] => 17/546974 [patent_app_country] => US [patent_app_date] => 2021-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11319 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17546974 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/546974
Apparatus and method for error reduction in distributed quantum systems via fusing-and-decomposing gates Dec 8, 2021 Issued
Array ( [id] => 18138990 [patent_doc_number] => 20230012825 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-19 [patent_title] => MEMORY AND OPERATION METHOD OF MEMORY [patent_app_type] => utility [patent_app_number] => 17/537033 [patent_app_country] => US [patent_app_date] => 2021-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4385 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17537033 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/537033
Memory and operation method of memory Nov 28, 2021 Issued
Array ( [id] => 18944419 [patent_doc_number] => 20240039558 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-01 [patent_title] => Radio Transmitter and Receiver [patent_app_type] => utility [patent_app_number] => 18/265295 [patent_app_country] => US [patent_app_date] => 2021-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9856 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18265295 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/265295
Radio Transmitter and Receiver Nov 28, 2021 Abandoned
Array ( [id] => 17796473 [patent_doc_number] => 20220255565 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-11 [patent_title] => APPARATUS AND METHOD FOR SUCCESSIVE CANCELLATION BIT-FLIP DECODING OF POLAR CODE [patent_app_type] => utility [patent_app_number] => 17/530999 [patent_app_country] => US [patent_app_date] => 2021-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5422 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17530999 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/530999
Apparatus and method for successive cancellation bit-flip decoding of polar code Nov 18, 2021 Issued
Array ( [id] => 18378108 [patent_doc_number] => 20230153195 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-18 [patent_title] => MANAGING MACHINE LEARNING MODEL RECONSTRUCTION [patent_app_type] => utility [patent_app_number] => 17/455364 [patent_app_country] => US [patent_app_date] => 2021-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11375 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17455364 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/455364
Managing machine learning model reconstruction Nov 16, 2021 Issued
Array ( [id] => 20709472 [patent_doc_number] => 20260133806 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-05-14 [patent_title] => INFORMATION MANAGEMENT APPARATUS, SYSTEM, AND METHOD, AND COMPUTER READABLE MEDIUM [patent_app_type] => utility [patent_app_number] => 18/706159 [patent_app_country] => US [patent_app_date] => 2021-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15630 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18706159 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/706159
INFORMATION MANAGEMENT APPARATUS, SYSTEM, AND METHOD, AND COMPUTER READABLE MEDIUM Nov 14, 2021 Pending
Array ( [id] => 18494592 [patent_doc_number] => 11700017 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-11 [patent_title] => Method and system for providing minimal aliasing error correction code [patent_app_type] => utility [patent_app_number] => 17/524803 [patent_app_country] => US [patent_app_date] => 2021-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 7428 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17524803 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/524803
Method and system for providing minimal aliasing error correction code Nov 11, 2021 Issued
Array ( [id] => 18897602 [patent_doc_number] => 20240013087 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-11 [patent_title] => VIRTUAL DISTILLATION FOR QUANTUM ERROR MITIGATION [patent_app_type] => utility [patent_app_number] => 18/036252 [patent_app_country] => US [patent_app_date] => 2021-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12015 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18036252 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/036252
Virtual distillation for quantum error mitigation Nov 10, 2021 Issued
Array ( [id] => 18890839 [patent_doc_number] => 11869616 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-09 [patent_title] => Centrally logging and aggregating miscompares on chip during memory test [patent_app_type] => utility [patent_app_number] => 17/524039 [patent_app_country] => US [patent_app_date] => 2021-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6384 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17524039 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/524039
Centrally logging and aggregating miscompares on chip during memory test Nov 10, 2021 Issued
Array ( [id] => 18822022 [patent_doc_number] => 20230396363 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-07 [patent_title] => Symbol Interleaving for Parameter Estimation [patent_app_type] => utility [patent_app_number] => 18/249478 [patent_app_country] => US [patent_app_date] => 2021-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17355 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18249478 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/249478
Symbol interleaving for parameter estimation Oct 24, 2021 Issued
Array ( [id] => 17372187 [patent_doc_number] => 20220027239 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-27 [patent_title] => STORAGE SYSTEM [patent_app_type] => utility [patent_app_number] => 17/497092 [patent_app_country] => US [patent_app_date] => 2021-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17134 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17497092 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/497092
Storage system Oct 7, 2021 Issued
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