Search

Thienvu V. Tran

Supervisory Patent Examiner (ID: 17040, Phone: (571)270-1276 , Office: P/2836 )

Most Active Art Unit
2819
Art Unit(s)
2819, 2836, 2844, 2839, 2838
Total Applications
548
Issued Applications
464
Pending Applications
2
Abandoned Applications
87

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8340869 [patent_doc_number] => 08242799 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-08-14 [patent_title] => 'System and method for phase error reduction in quantum systems' [patent_app_type] => utility [patent_app_number] => 12/947128 [patent_app_country] => US [patent_app_date] => 2010-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 6975 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12947128 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/947128
System and method for phase error reduction in quantum systems Nov 15, 2010 Issued
Array ( [id] => 8116085 [patent_doc_number] => 08159265 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-04-17 [patent_title] => 'Memory for metal configurable integrated circuits' [patent_app_type] => utility [patent_app_number] => 12/947589 [patent_app_country] => US [patent_app_date] => 2010-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 30 [patent_no_of_words] => 14384 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 9 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/159/08159265.pdf [firstpage_image] =>[orig_patent_app_number] => 12947589 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/947589
Memory for metal configurable integrated circuits Nov 15, 2010 Issued
Array ( [id] => 8116089 [patent_doc_number] => 08159266 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-04-17 [patent_title] => 'Metal configurable integrated circuits' [patent_app_type] => utility [patent_app_number] => 12/947467 [patent_app_country] => US [patent_app_date] => 2010-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 30 [patent_no_of_words] => 14401 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/159/08159266.pdf [firstpage_image] =>[orig_patent_app_number] => 12947467 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/947467
Metal configurable integrated circuits Nov 15, 2010 Issued
Array ( [id] => 6200203 [patent_doc_number] => 20110062989 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-03-17 [patent_title] => 'State machines using non-volatile re-writeable two-terminal resistivity-sensitive memories' [patent_app_type] => utility [patent_app_number] => 12/927546 [patent_app_country] => US [patent_app_date] => 2010-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5243 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0062/20110062989.pdf [firstpage_image] =>[orig_patent_app_number] => 12927546 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/927546
State machines using non-volatile re-writeable two-terminal resistivity-sensitive memories Nov 14, 2010 Issued
Array ( [id] => 8753865 [patent_doc_number] => 20130088169 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-04-11 [patent_title] => 'CONSTANT-CURRENT LED DRIVER CIRCUIT AND OUTPUT VOLTAGE ADJUSTABLE CIRCUIT AND METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/700352 [patent_app_country] => US [patent_app_date] => 2010-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5970 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13700352 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/700352
Constant-current LED driver circuit and output voltage adjustable circuit and method thereof Nov 9, 2010 Issued
Array ( [id] => 8180996 [patent_doc_number] => 20120112788 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-10 [patent_title] => 'Phase Change Device for Interconnection of Programmable Logic Device' [patent_app_type] => utility [patent_app_number] => 12/942462 [patent_app_country] => US [patent_app_date] => 2010-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 6624 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0112/20120112788.pdf [firstpage_image] =>[orig_patent_app_number] => 12942462 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/942462
Phase change device for interconnection of programmable logic device Nov 8, 2010 Issued
Array ( [id] => 7667316 [patent_doc_number] => 20110316585 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-29 [patent_title] => 'Interlock Circuit And Interlock System Including The Same' [patent_app_type] => utility [patent_app_number] => 12/941803 [patent_app_country] => US [patent_app_date] => 2010-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 12267 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12941803 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/941803
Interlock circuit and interlock system including the same Nov 7, 2010 Issued
Array ( [id] => 8167413 [patent_doc_number] => 20120105102 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-03 [patent_title] => 'MAGNETIC LOGIC GATE' [patent_app_type] => utility [patent_app_number] => 12/916119 [patent_app_country] => US [patent_app_date] => 2010-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 14025 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0105/20120105102.pdf [firstpage_image] =>[orig_patent_app_number] => 12916119 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/916119
Magnetic logic gate Oct 28, 2010 Issued
Array ( [id] => 7505420 [patent_doc_number] => 08035413 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-10-11 [patent_title] => 'Dynamic impedance control for input/output buffers' [patent_app_type] => utility [patent_app_number] => 12/915796 [patent_app_country] => US [patent_app_date] => 2010-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7662 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 244 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/035/08035413.pdf [firstpage_image] =>[orig_patent_app_number] => 12915796 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/915796
Dynamic impedance control for input/output buffers Oct 28, 2010 Issued
Array ( [id] => 7546129 [patent_doc_number] => 08054103 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-11-08 [patent_title] => 'Synchronous clock multiplexing and output-enable' [patent_app_type] => utility [patent_app_number] => 12/909837 [patent_app_country] => US [patent_app_date] => 2010-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 4936 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 323 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/054/08054103.pdf [firstpage_image] =>[orig_patent_app_number] => 12909837 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/909837
Synchronous clock multiplexing and output-enable Oct 21, 2010 Issued
Array ( [id] => 4444235 [patent_doc_number] => 07928767 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-04-19 [patent_title] => 'Buffer-driving circuit capable of increasing responding speed and prolonging lifespan, buffer, and method thereof' [patent_app_type] => utility [patent_app_number] => 12/908881 [patent_app_country] => US [patent_app_date] => 2010-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 5387 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/928/07928767.pdf [firstpage_image] =>[orig_patent_app_number] => 12908881 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/908881
Buffer-driving circuit capable of increasing responding speed and prolonging lifespan, buffer, and method thereof Oct 20, 2010 Issued
Array ( [id] => 4511950 [patent_doc_number] => 07915922 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-29 [patent_title] => 'Buffer-driving circuit capable of increasing responding speed and prolonging lifespan, buffer, and method thereof' [patent_app_type] => utility [patent_app_number] => 12/908886 [patent_app_country] => US [patent_app_date] => 2010-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 5387 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/915/07915922.pdf [firstpage_image] =>[orig_patent_app_number] => 12908886 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/908886
Buffer-driving circuit capable of increasing responding speed and prolonging lifespan, buffer, and method thereof Oct 20, 2010 Issued
Array ( [id] => 4610869 [patent_doc_number] => 07994820 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-08-09 [patent_title] => 'Level shifter with embedded logic and low minimum voltage' [patent_app_type] => utility [patent_app_number] => 12/908574 [patent_app_country] => US [patent_app_date] => 2010-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 9318 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 256 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/994/07994820.pdf [firstpage_image] =>[orig_patent_app_number] => 12908574 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/908574
Level shifter with embedded logic and low minimum voltage Oct 19, 2010 Issued
Array ( [id] => 5964517 [patent_doc_number] => 20110148462 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-23 [patent_title] => 'Post-Programming Functional Verification for Programable Integrated Circuits' [patent_app_type] => utility [patent_app_number] => 12/908841 [patent_app_country] => US [patent_app_date] => 2010-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5778 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0148/20110148462.pdf [firstpage_image] =>[orig_patent_app_number] => 12908841 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/908841
Post-programming functional verification for programable integrated circuits Oct 19, 2010 Issued
Array ( [id] => 5964510 [patent_doc_number] => 20110148457 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-23 [patent_title] => 'PROTECTING ELECTRONIC SYSTEMS FROM COUNTERFEITING AND REVERSE-ENGINEERING' [patent_app_type] => utility [patent_app_number] => 12/903952 [patent_app_country] => US [patent_app_date] => 2010-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4087 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0148/20110148457.pdf [firstpage_image] =>[orig_patent_app_number] => 12903952 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/903952
PROTECTING ELECTRONIC SYSTEMS FROM COUNTERFEITING AND REVERSE-ENGINEERING Oct 12, 2010 Abandoned
Array ( [id] => 8630722 [patent_doc_number] => 08362800 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-01-29 [patent_title] => '3D semiconductor device including field repairable logics' [patent_app_type] => utility [patent_app_number] => 12/904108 [patent_app_country] => US [patent_app_date] => 2010-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 74 [patent_figures_cnt] => 89 [patent_no_of_words] => 25295 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12904108 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/904108
3D semiconductor device including field repairable logics Oct 12, 2010 Issued
Array ( [id] => 8676315 [patent_doc_number] => 08384432 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-02-26 [patent_title] => 'Semiconductor device and information processing system including the same' [patent_app_type] => utility [patent_app_number] => 12/923832 [patent_app_country] => US [patent_app_date] => 2010-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 9816 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12923832 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/923832
Semiconductor device and information processing system including the same Oct 7, 2010 Issued
Array ( [id] => 8714045 [patent_doc_number] => 08400187 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-19 [patent_title] => 'Logic circuit and semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/901057 [patent_app_country] => US [patent_app_date] => 2010-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 73 [patent_no_of_words] => 49579 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 244 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12901057 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/901057
Logic circuit and semiconductor device Oct 7, 2010 Issued
Array ( [id] => 7796539 [patent_doc_number] => 08125247 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-02-28 [patent_title] => 'Complementary spin transistor logic circuit' [patent_app_type] => utility [patent_app_number] => 12/899778 [patent_app_country] => US [patent_app_date] => 2010-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4063 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 259 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/125/08125247.pdf [firstpage_image] =>[orig_patent_app_number] => 12899778 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/899778
Complementary spin transistor logic circuit Oct 6, 2010 Issued
Array ( [id] => 6121644 [patent_doc_number] => 20110084729 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-04-14 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/923752 [patent_app_country] => US [patent_app_date] => 2010-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 12075 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0084/20110084729.pdf [firstpage_image] =>[orig_patent_app_number] => 12923752 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/923752
Semiconductor device using normal and auxiliary through silicon vias Oct 5, 2010 Issued
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