Search

Thienvu V. Tran

Supervisory Patent Examiner (ID: 17040, Phone: (571)270-1276 , Office: P/2836 )

Most Active Art Unit
2819
Art Unit(s)
2819, 2836, 2844, 2839, 2838
Total Applications
548
Issued Applications
464
Pending Applications
2
Abandoned Applications
87

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8572507 [patent_doc_number] => 08339157 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-12-25 [patent_title] => 'Methods, circuits, systems and arrangements for undriven or driven pins' [patent_app_type] => utility [patent_app_number] => 12/922661 [patent_app_country] => US [patent_app_date] => 2009-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3300 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12922661 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/922661
Methods, circuits, systems and arrangements for undriven or driven pins Mar 15, 2009 Issued
Array ( [id] => 5401824 [patent_doc_number] => 20090237137 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-09-24 [patent_title] => 'Flip-Flop Capable of Operating at High-Speed' [patent_app_type] => utility [patent_app_number] => 12/404982 [patent_app_country] => US [patent_app_date] => 2009-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4979 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0237/20090237137.pdf [firstpage_image] =>[orig_patent_app_number] => 12404982 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/404982
Flip-Flop Capable of Operating at High-Speed Mar 15, 2009 Abandoned
Array ( [id] => 4584541 [patent_doc_number] => 07834662 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-11-16 [patent_title] => 'Level shifter with embedded logic and low minimum voltage' [patent_app_type] => utility [patent_app_number] => 12/404597 [patent_app_country] => US [patent_app_date] => 2009-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 9292 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/834/07834662.pdf [firstpage_image] =>[orig_patent_app_number] => 12404597 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/404597
Level shifter with embedded logic and low minimum voltage Mar 15, 2009 Issued
Array ( [id] => 84865 [patent_doc_number] => 07741871 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-06-22 [patent_title] => 'Integrated circuit device, electro-optical device, and electronic instrument' [patent_app_type] => utility [patent_app_number] => 12/404806 [patent_app_country] => US [patent_app_date] => 2009-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 18 [patent_no_of_words] => 10850 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/741/07741871.pdf [firstpage_image] =>[orig_patent_app_number] => 12404806 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/404806
Integrated circuit device, electro-optical device, and electronic instrument Mar 15, 2009 Issued
Array ( [id] => 5456433 [patent_doc_number] => 20090256585 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-10-15 [patent_title] => 'DATA LINE TERMINATION CIRCUIT' [patent_app_type] => utility [patent_app_number] => 12/403549 [patent_app_country] => US [patent_app_date] => 2009-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2860 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0256/20090256585.pdf [firstpage_image] =>[orig_patent_app_number] => 12403549 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/403549
Data line termination circuit Mar 12, 2009 Issued
Array ( [id] => 4566327 [patent_doc_number] => 07839170 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-11-23 [patent_title] => 'Low power single rail input voltage level shifter' [patent_app_type] => utility [patent_app_number] => 12/404183 [patent_app_country] => US [patent_app_date] => 2009-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6591 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/839/07839170.pdf [firstpage_image] =>[orig_patent_app_number] => 12404183 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/404183
Low power single rail input voltage level shifter Mar 12, 2009 Issued
Array ( [id] => 6524349 [patent_doc_number] => 20100231256 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-16 [patent_title] => 'SPARE CELL LIBRARY DESIGN FOR INTEGRATED CIRCUIT' [patent_app_type] => utility [patent_app_number] => 12/400849 [patent_app_country] => US [patent_app_date] => 2009-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4341 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0231/20100231256.pdf [firstpage_image] =>[orig_patent_app_number] => 12400849 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/400849
SPARE CELL LIBRARY DESIGN FOR INTEGRATED CIRCUIT Mar 9, 2009 Abandoned
Array ( [id] => 8690790 [patent_doc_number] => 08390319 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-05 [patent_title] => 'Programmable logic fabric' [patent_app_type] => utility [patent_app_number] => 12/919347 [patent_app_country] => US [patent_app_date] => 2009-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 42 [patent_no_of_words] => 10168 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12919347 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/919347
Programmable logic fabric Feb 24, 2009 Issued
Array ( [id] => 5477990 [patent_doc_number] => 20090200947 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-08-13 [patent_title] => 'VEHICLE LAMP CONTROL SYSTEM AND CONTROL METHOD' [patent_app_type] => utility [patent_app_number] => 12/369858 [patent_app_country] => US [patent_app_date] => 2009-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4676 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0200/20090200947.pdf [firstpage_image] =>[orig_patent_app_number] => 12369858 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/369858
Vehicle lamp control system and control method Feb 11, 2009 Issued
Array ( [id] => 4629964 [patent_doc_number] => 08008864 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-08-30 [patent_title] => 'Single LED string lighting' [patent_app_type] => utility [patent_app_number] => 12/365901 [patent_app_country] => US [patent_app_date] => 2009-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 5971 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/008/08008864.pdf [firstpage_image] =>[orig_patent_app_number] => 12365901 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/365901
Single LED string lighting Feb 4, 2009 Issued
Array ( [id] => 7724807 [patent_doc_number] => 08098080 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-01-17 [patent_title] => 'Semiconductor programmable device' [patent_app_type] => utility [patent_app_number] => 12/919356 [patent_app_country] => US [patent_app_date] => 2008-12-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 24 [patent_no_of_words] => 7626 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/098/08098080.pdf [firstpage_image] =>[orig_patent_app_number] => 12919356 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/919356
Semiconductor programmable device Dec 23, 2008 Issued
Array ( [id] => 9240028 [patent_doc_number] => 08604823 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-12-10 [patent_title] => 'Selectively disabled output' [patent_app_type] => utility [patent_app_number] => 12/332789 [patent_app_country] => US [patent_app_date] => 2008-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 4341 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12332789 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/332789
Selectively disabled output Dec 10, 2008 Issued
Array ( [id] => 6554188 [patent_doc_number] => 20100127736 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-05-27 [patent_title] => 'LOW VOLTAGE DIFFERENTIAL SIGNALING DRIVER WITH PROGRAMMABLE ON-CHIP RESISTOR TERMINATION' [patent_app_type] => utility [patent_app_number] => 12/323248 [patent_app_country] => US [patent_app_date] => 2008-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7087 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0127/20100127736.pdf [firstpage_image] =>[orig_patent_app_number] => 12323248 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/323248
Low voltage differential signaling driver with programmable on-chip resistor termination Nov 24, 2008 Issued
Array ( [id] => 6011463 [patent_doc_number] => 20110221469 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-15 [patent_title] => 'LOGIC BUILT-IN SELF-TEST SYSTEM AND METHOD FOR APPLYING A LOGIC BUILT-IN SELF-TEST TO A DEVICE UNDER TEST' [patent_app_type] => utility [patent_app_number] => 13/126854 [patent_app_country] => US [patent_app_date] => 2008-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6715 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0221/20110221469.pdf [firstpage_image] =>[orig_patent_app_number] => 13126854 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/126854
Logic built-in self-test system and method for applying a logic built-in self-test to a device under test Nov 23, 2008 Issued
Array ( [id] => 6011463 [patent_doc_number] => 20110221469 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-15 [patent_title] => 'LOGIC BUILT-IN SELF-TEST SYSTEM AND METHOD FOR APPLYING A LOGIC BUILT-IN SELF-TEST TO A DEVICE UNDER TEST' [patent_app_type] => utility [patent_app_number] => 13/126854 [patent_app_country] => US [patent_app_date] => 2008-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6715 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0221/20110221469.pdf [firstpage_image] =>[orig_patent_app_number] => 13126854 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/126854
Logic built-in self-test system and method for applying a logic built-in self-test to a device under test Nov 23, 2008 Issued
Array ( [id] => 8283352 [patent_doc_number] => 08217457 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-07-10 [patent_title] => 'Electrostatic discharge (ESD) protection device for use with multiple I/O standards' [patent_app_type] => utility [patent_app_number] => 12/272042 [patent_app_country] => US [patent_app_date] => 2008-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4000 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12272042 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/272042
Electrostatic discharge (ESD) protection device for use with multiple I/O standards Nov 16, 2008 Issued
Array ( [id] => 4578396 [patent_doc_number] => 07830175 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-11-09 [patent_title] => 'Low power single-rail-input voltage level shifter' [patent_app_type] => utility [patent_app_number] => 12/269200 [patent_app_country] => US [patent_app_date] => 2008-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 5688 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 322 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/830/07830175.pdf [firstpage_image] =>[orig_patent_app_number] => 12269200 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/269200
Low power single-rail-input voltage level shifter Nov 11, 2008 Issued
Array ( [id] => 4434149 [patent_doc_number] => 07969195 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-06-28 [patent_title] => 'Active biasing in metal oxide semiconductor (MOS) differential pairs' [patent_app_type] => utility [patent_app_number] => 12/265609 [patent_app_country] => US [patent_app_date] => 2008-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 13151 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/969/07969195.pdf [firstpage_image] =>[orig_patent_app_number] => 12265609 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/265609
Active biasing in metal oxide semiconductor (MOS) differential pairs Nov 4, 2008 Issued
Array ( [id] => 10899022 [patent_doc_number] => 08922246 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-12-30 [patent_title] => 'System and process for overcoming wire-bond originated cross-talk' [patent_app_type] => utility [patent_app_number] => 12/255809 [patent_app_country] => US [patent_app_date] => 2008-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6683 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12255809 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/255809
System and process for overcoming wire-bond originated cross-talk Oct 21, 2008 Issued
Array ( [id] => 5532245 [patent_doc_number] => 20090232033 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-09-17 [patent_title] => 'Hybrid frequency compensation network' [patent_app_type] => utility [patent_app_number] => 12/284773 [patent_app_country] => US [patent_app_date] => 2008-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 169 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0232/20090232033.pdf [firstpage_image] =>[orig_patent_app_number] => 12284773 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/284773
Hybrid frequency compensation network Sep 23, 2008 Issued
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