
Thienvu V. Tran
Supervisory Patent Examiner (ID: 17040, Phone: (571)270-1276 , Office: P/2836 )
| Most Active Art Unit | 2819 |
| Art Unit(s) | 2819, 2836, 2844, 2839, 2838 |
| Total Applications | 548 |
| Issued Applications | 464 |
| Pending Applications | 2 |
| Abandoned Applications | 87 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 212049
[patent_doc_number] => 07622956
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-11-24
[patent_title] => 'Output driving circuit'
[patent_app_type] => utility
[patent_app_number] => 11/944403
[patent_app_country] => US
[patent_app_date] => 2007-11-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2104
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 130
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/622/07622956.pdf
[firstpage_image] =>[orig_patent_app_number] => 11944403
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/944403 | Output driving circuit | Nov 20, 2007 | Issued |
Array
(
[id] => 205599
[patent_doc_number] => 07629814
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-12-08
[patent_title] => 'Latch circuit and deserializer circuit'
[patent_app_type] => utility
[patent_app_number] => 11/942922
[patent_app_country] => US
[patent_app_date] => 2007-11-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 25
[patent_no_of_words] => 4836
[patent_no_of_claims] => 18
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[patent_words_short_claim] => 188
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/629/07629814.pdf
[firstpage_image] =>[orig_patent_app_number] => 11942922
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/942922 | Latch circuit and deserializer circuit | Nov 19, 2007 | Issued |
Array
(
[id] => 93523
[patent_doc_number] => 07733117
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2010-06-08
[patent_title] => 'Method for protecting a security real time clock generator and a device having protection capabilities'
[patent_app_type] => utility
[patent_app_number] => 11/942799
[patent_app_country] => US
[patent_app_date] => 2007-11-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2075
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 130
[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/733/07733117.pdf
[firstpage_image] =>[orig_patent_app_number] => 11942799
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/942799 | Method for protecting a security real time clock generator and a device having protection capabilities | Nov 19, 2007 | Issued |
Array
(
[id] => 253237
[patent_doc_number] => 07579873
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2009-08-25
[patent_title] => 'Slew rate control circuit for small computer system interface (SCSI) differential driver'
[patent_app_type] => utility
[patent_app_number] => 11/985706
[patent_app_country] => US
[patent_app_date] => 2007-11-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 9
[patent_no_of_words] => 5066
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 113
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/579/07579873.pdf
[firstpage_image] =>[orig_patent_app_number] => 11985706
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/985706 | Slew rate control circuit for small computer system interface (SCSI) differential driver | Nov 15, 2007 | Issued |
Array
(
[id] => 285398
[patent_doc_number] => 07550324
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2009-06-23
[patent_title] => 'Interface port for electrically programmed fuses in a programmable logic device'
[patent_app_type] => utility
[patent_app_number] => 11/985501
[patent_app_country] => US
[patent_app_date] => 2007-11-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 14
[patent_no_of_words] => 10049
[patent_no_of_claims] => 8
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[patent_words_short_claim] => 240
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/550/07550324.pdf
[firstpage_image] =>[orig_patent_app_number] => 11985501
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/985501 | Interface port for electrically programmed fuses in a programmable logic device | Nov 14, 2007 | Issued |
Array
(
[id] => 104230
[patent_doc_number] => 07724034
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-05-25
[patent_title] => 'Floating driving circuit'
[patent_app_type] => utility
[patent_app_number] => 11/984122
[patent_app_country] => US
[patent_app_date] => 2007-11-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[patent_no_of_words] => 2688
[patent_no_of_claims] => 3
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/724/07724034.pdf
[firstpage_image] =>[orig_patent_app_number] => 11984122
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/984122 | Floating driving circuit | Nov 13, 2007 | Issued |
Array
(
[id] => 4731740
[patent_doc_number] => 20080048718
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-02-28
[patent_title] => 'PROGRAMMABLE GATE ARRAY APPARATUS AND METHOD FOR SWITCHING CIRCUITS'
[patent_app_type] => utility
[patent_app_number] => 11/874981
[patent_app_country] => US
[patent_app_date] => 2007-10-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 10969
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[pdf_file] => publications/A1/0048/20080048718.pdf
[firstpage_image] =>[orig_patent_app_number] => 11874981
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/874981 | Programmable gate array apparatus and method for switching circuits | Oct 18, 2007 | Issued |
Array
(
[id] => 6354518
[patent_doc_number] => 20100072898
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-03-25
[patent_title] => 'LED DRIVING CIRCUIT'
[patent_app_type] => utility
[patent_app_number] => 12/442830
[patent_app_country] => US
[patent_app_date] => 2007-10-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
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[patent_no_of_words] => 9440
[patent_no_of_claims] => 19
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[pdf_file] => publications/A1/0072/20100072898.pdf
[firstpage_image] =>[orig_patent_app_number] => 12442830
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/442830 | LED driving circuit | Oct 16, 2007 | Issued |
Array
(
[id] => 4729022
[patent_doc_number] => 20080208541
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-08-28
[patent_title] => 'Method and Enhanced Phase Locked Loop Circuits for Implementing Effective Testing'
[patent_app_type] => utility
[patent_app_number] => 11/870159
[patent_app_country] => US
[patent_app_date] => 2007-10-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[pdf_file] => publications/A1/0208/20080208541.pdf
[firstpage_image] =>[orig_patent_app_number] => 11870159
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/870159 | Method and Enhanced Phase Locked Loop Circuits for Implementing Effective Testing | Oct 9, 2007 | Abandoned |
Array
(
[id] => 4913694
[patent_doc_number] => 20080094293
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-04-24
[patent_title] => 'Broadband antenna'
[patent_app_type] => utility
[patent_app_number] => 11/905009
[patent_app_country] => US
[patent_app_date] => 2007-09-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[patent_no_of_words] => 1537
[patent_no_of_claims] => 14
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[pdf_file] => publications/A1/0094/20080094293.pdf
[firstpage_image] =>[orig_patent_app_number] => 11905009
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/905009 | Broadband antenna | Sep 26, 2007 | Abandoned |
Array
(
[id] => 4795714
[patent_doc_number] => 20080007300
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-01-10
[patent_title] => 'Method and Apparatus for Buffering Bi-Directional Open Drain Signal Lines'
[patent_app_type] => utility
[patent_app_number] => 11/858324
[patent_app_country] => US
[patent_app_date] => 2007-09-20
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0007/20080007300.pdf
[firstpage_image] =>[orig_patent_app_number] => 11858324
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/858324 | Method and Apparatus for Buffering Bi-Directional Open Drain Signal Lines | Sep 19, 2007 | Abandoned |
Array
(
[id] => 289591
[patent_doc_number] => 07548209
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-06-16
[patent_title] => 'Portable wireless communication apparatus'
[patent_app_type] => utility
[patent_app_number] => 11/898682
[patent_app_country] => US
[patent_app_date] => 2007-09-14
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/07/548/07548209.pdf
[firstpage_image] =>[orig_patent_app_number] => 11898682
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/898682 | Portable wireless communication apparatus | Sep 13, 2007 | Issued |
Array
(
[id] => 178645
[patent_doc_number] => 07656355
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-02-02
[patent_title] => 'Stylus arranged with antenna and portable wireless communication device having the same'
[patent_app_type] => utility
[patent_app_number] => 11/898681
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[pdf_file] => patents/07/656/07656355.pdf
[firstpage_image] =>[orig_patent_app_number] => 11898681
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/898681 | Stylus arranged with antenna and portable wireless communication device having the same | Sep 13, 2007 | Issued |
Array
(
[id] => 5320751
[patent_doc_number] => 20090058741
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-03-05
[patent_title] => 'Dual circularly polarized antenna system and a method of communicating signals by the antenna system'
[patent_app_type] => utility
[patent_app_number] => 11/899200
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[patent_app_date] => 2007-09-05
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[pdf_file] => publications/A1/0058/20090058741.pdf
[firstpage_image] =>[orig_patent_app_number] => 11899200
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/899200 | Dual circularly polarized antenna system and a method of communicating signals by the antenna system | Sep 4, 2007 | Issued |
Array
(
[id] => 8153333
[patent_doc_number] => 08169154
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-05-01
[patent_title] => 'Variable load circuits for use with lighting control devices'
[patent_app_type] => utility
[patent_app_number] => 12/438587
[patent_app_country] => US
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[pdf_file] => patents/08/169/08169154.pdf
[firstpage_image] =>[orig_patent_app_number] => 12438587
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/438587 | Variable load circuits for use with lighting control devices | Sep 3, 2007 | Issued |
Array
(
[id] => 55395
[patent_doc_number] => 07768311
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-08-03
[patent_title] => 'Suppressing ringing in high speed CMOS output buffers driving transmission line load'
[patent_app_type] => utility
[patent_app_number] => 11/897520
[patent_app_country] => US
[patent_app_date] => 2007-08-30
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/768/07768311.pdf
[firstpage_image] =>[orig_patent_app_number] => 11897520
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/897520 | Suppressing ringing in high speed CMOS output buffers driving transmission line load | Aug 29, 2007 | Issued |
Array
(
[id] => 4731777
[patent_doc_number] => 20080048755
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-02-28
[patent_title] => 'Input/output device with fixed value during sleep mode or at a time of supplying initial voltage to system'
[patent_app_type] => utility
[patent_app_number] => 11/895931
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/895931 | Input/output device with fixed value during sleep mode or at a time of supplying initial voltage to system | Aug 27, 2007 | Issued |
Array
(
[id] => 4843935
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/892730 | Multi-broad band antenna and electronic device thereof | Aug 26, 2007 | Issued |
Array
(
[id] => 8007313
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[patent_title] => 'Output circuit of semiconductor device'
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[firstpage_image] =>[orig_patent_app_number] => 11892747
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/892747 | Output circuit of semiconductor device | Aug 26, 2007 | Issued |
Array
(
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[pdf_file] => patents/07/642/07642812.pdf
[firstpage_image] =>[orig_patent_app_number] => 11895594
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/895594 | Distribution and synchronization of a divided clock signal | Aug 23, 2007 | Issued |