Search

Thienvu V. Tran

Supervisory Patent Examiner (ID: 7710, Phone: (571)270-1276 , Office: P/2836 )

Most Active Art Unit
2819
Art Unit(s)
2819, 2838, 2844, 2836, 2839
Total Applications
551
Issued Applications
466
Pending Applications
1
Abandoned Applications
88

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 203782 [patent_doc_number] => 07633349 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-12-15 [patent_title] => 'Phase frequency detectors generating minimum pulse widths' [patent_app_type] => utility [patent_app_number] => 11/696575 [patent_app_country] => US [patent_app_date] => 2007-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6401 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/633/07633349.pdf [firstpage_image] =>[orig_patent_app_number] => 11696575 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/696575
Phase frequency detectors generating minimum pulse widths Apr 3, 2007 Issued
Array ( [id] => 4680295 [patent_doc_number] => 20080246521 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-09 [patent_title] => 'MULTIPLE REFERENCE FREQUENCY FRACTIONAL-N PLL (PHASE LOCKED LOOP)' [patent_app_type] => utility [patent_app_number] => 11/696268 [patent_app_country] => US [patent_app_date] => 2007-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3321 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0246/20080246521.pdf [firstpage_image] =>[orig_patent_app_number] => 11696268 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/696268
Multiple reference frequency fractional-N PLL (phase locked loop) Apr 3, 2007 Issued
Array ( [id] => 565685 [patent_doc_number] => 07471111 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-12-30 [patent_title] => 'Slew-rate controlled pad driver in digital CMOS process using parasitic device cap' [patent_app_type] => utility [patent_app_number] => 11/696247 [patent_app_country] => US [patent_app_date] => 2007-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 13 [patent_no_of_words] => 5115 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 347 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/471/07471111.pdf [firstpage_image] =>[orig_patent_app_number] => 11696247 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/696247
Slew-rate controlled pad driver in digital CMOS process using parasitic device cap Apr 3, 2007 Issued
Array ( [id] => 5123982 [patent_doc_number] => 20070236253 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-11 [patent_title] => 'SEMICONDUCTOR INTEGRATED CIRCUIT' [patent_app_type] => utility [patent_app_number] => 11/695771 [patent_app_country] => US [patent_app_date] => 2007-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6346 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0236/20070236253.pdf [firstpage_image] =>[orig_patent_app_number] => 11695771 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/695771
SEMICONDUCTOR INTEGRATED CIRCUIT Apr 2, 2007 Abandoned
Array ( [id] => 580949 [patent_doc_number] => 07459940 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-12-02 [patent_title] => 'Local clock buffer (LCB) with asymmetric inductive peaking' [patent_app_type] => utility [patent_app_number] => 11/695190 [patent_app_country] => US [patent_app_date] => 2007-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 2619 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/459/07459940.pdf [firstpage_image] =>[orig_patent_app_number] => 11695190 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/695190
Local clock buffer (LCB) with asymmetric inductive peaking Apr 1, 2007 Issued
Array ( [id] => 4715952 [patent_doc_number] => 20080238474 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-02 [patent_title] => 'BOOSTER CIRCUITS FOR REDUCING LATENCY' [patent_app_type] => utility [patent_app_number] => 11/694729 [patent_app_country] => US [patent_app_date] => 2007-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5149 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0238/20080238474.pdf [firstpage_image] =>[orig_patent_app_number] => 11694729 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/694729
BOOSTER CIRCUITS FOR REDUCING LATENCY Mar 29, 2007 Abandoned
Array ( [id] => 5470340 [patent_doc_number] => 20090243506 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-10-01 [patent_title] => 'METHOD AND DEVICE FOR DRIVING A LAMP' [patent_app_type] => utility [patent_app_number] => 12/295658 [patent_app_country] => US [patent_app_date] => 2007-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3918 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0243/20090243506.pdf [firstpage_image] =>[orig_patent_app_number] => 12295658 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/295658
METHOD AND DEVICE FOR DRIVING A LAMP Mar 28, 2007 Abandoned
Array ( [id] => 4715958 [patent_doc_number] => 20080238480 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-02 [patent_title] => 'REVERSIBLE SEQUENTIAL APPARATUSES' [patent_app_type] => utility [patent_app_number] => 11/692394 [patent_app_country] => US [patent_app_date] => 2007-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3509 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0238/20080238480.pdf [firstpage_image] =>[orig_patent_app_number] => 11692394 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/692394
Reversible sequential apparatuses Mar 27, 2007 Issued
Array ( [id] => 6385455 [patent_doc_number] => 20100176752 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-15 [patent_title] => 'EVENT BASED AMBIENT LIGHTING CONTROL' [patent_app_type] => utility [patent_app_number] => 12/294621 [patent_app_country] => US [patent_app_date] => 2007-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4838 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0176/20100176752.pdf [firstpage_image] =>[orig_patent_app_number] => 12294621 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/294621
EVENT BASED AMBIENT LIGHTING CONTROL Mar 26, 2007 Abandoned
Array ( [id] => 5499676 [patent_doc_number] => 20090160364 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-06-25 [patent_title] => 'OPERATING SOLID-STATE LIGHTING ELEMENTS' [patent_app_type] => utility [patent_app_number] => 12/296080 [patent_app_country] => US [patent_app_date] => 2007-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3748 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0160/20090160364.pdf [firstpage_image] =>[orig_patent_app_number] => 12296080 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/296080
OPERATING SOLID-STATE LIGHTING ELEMENTS Mar 26, 2007 Abandoned
Array ( [id] => 5248806 [patent_doc_number] => 20070245040 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-18 [patent_title] => 'DATA STORING' [patent_app_type] => utility [patent_app_number] => 11/691747 [patent_app_country] => US [patent_app_date] => 2007-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3706 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0245/20070245040.pdf [firstpage_image] =>[orig_patent_app_number] => 11691747 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/691747
DATA STORING Mar 26, 2007 Abandoned
Array ( [id] => 5061640 [patent_doc_number] => 20070223279 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-09-27 [patent_title] => 'SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE' [patent_app_type] => utility [patent_app_number] => 11/691047 [patent_app_country] => US [patent_app_date] => 2007-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2735 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0223/20070223279.pdf [firstpage_image] =>[orig_patent_app_number] => 11691047 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/691047
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE Mar 25, 2007 Abandoned
Array ( [id] => 798286 [patent_doc_number] => 07427876 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-09-23 [patent_title] => 'Reversible sequential element and reversible sequential circuit thereof' [patent_app_type] => utility [patent_app_number] => 11/687983 [patent_app_country] => US [patent_app_date] => 2007-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 2280 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/427/07427876.pdf [firstpage_image] =>[orig_patent_app_number] => 11687983 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/687983
Reversible sequential element and reversible sequential circuit thereof Mar 18, 2007 Issued
Array ( [id] => 4817474 [patent_doc_number] => 20080224733 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-09-18 [patent_title] => 'ELECTRONIC CIRCUIT FOR MAINTAINING AND CONTROLLING DATA BUS STATE' [patent_app_type] => utility [patent_app_number] => 11/684890 [patent_app_country] => US [patent_app_date] => 2007-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4117 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0224/20080224733.pdf [firstpage_image] =>[orig_patent_app_number] => 11684890 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/684890
Electronic circuit for maintaining and controlling data bus state Mar 11, 2007 Issued
Array ( [id] => 5408621 [patent_doc_number] => 20090122519 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-05-14 [patent_title] => 'DISPLAY DEVICE ILLUMINATING DEVICE AND DISPLAY DEVICE PROVIDED WITH THE ILLUMINATING DEVICE' [patent_app_type] => utility [patent_app_number] => 12/297495 [patent_app_country] => US [patent_app_date] => 2007-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5696 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0122/20090122519.pdf [firstpage_image] =>[orig_patent_app_number] => 12297495 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/297495
Display device illuminating device and display device provided with the illuminating device Mar 4, 2007 Issued
Array ( [id] => 4724532 [patent_doc_number] => 20080204073 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-28 [patent_title] => 'REDUNDANT CONFIGURATION MEMORY SYSTEMS AND METHODS' [patent_app_type] => utility [patent_app_number] => 11/680526 [patent_app_country] => US [patent_app_date] => 2007-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5384 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0204/20080204073.pdf [firstpage_image] =>[orig_patent_app_number] => 11680526 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/680526
Redundant configuration memory systems and methods Feb 27, 2007 Issued
Array ( [id] => 4724613 [patent_doc_number] => 20080204154 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-28 [patent_title] => 'Method and Enhanced Phase Locked Loop Circuits for Implementing Effective Testing' [patent_app_type] => utility [patent_app_number] => 11/679323 [patent_app_country] => US [patent_app_date] => 2007-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2414 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0204/20080204154.pdf [firstpage_image] =>[orig_patent_app_number] => 11679323 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/679323
Method and enhanced phase locked loop circuits for implementing effective testing Feb 26, 2007 Issued
Array ( [id] => 5014497 [patent_doc_number] => 20070257705 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-11-08 [patent_title] => 'Device for managing the consumption peak of a domain on each powering-up' [patent_app_type] => utility [patent_app_number] => 11/701973 [patent_app_country] => US [patent_app_date] => 2007-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6380 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0257/20070257705.pdf [firstpage_image] =>[orig_patent_app_number] => 11701973 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/701973
Device for managing the consumption peak of a domain on each powering-up Feb 1, 2007 Issued
Array ( [id] => 23706 [patent_doc_number] => 07800400 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-09-21 [patent_title] => 'Configuration random access memory' [patent_app_type] => utility [patent_app_number] => 11/653001 [patent_app_country] => US [patent_app_date] => 2007-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 5823 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/800/07800400.pdf [firstpage_image] =>[orig_patent_app_number] => 11653001 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/653001
Configuration random access memory Jan 11, 2007 Issued
Array ( [id] => 7968453 [patent_doc_number] => 07940077 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-05-10 [patent_title] => 'Adjustable resistance' [patent_app_type] => utility [patent_app_number] => 11/641984 [patent_app_country] => US [patent_app_date] => 2006-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 6133 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/940/07940077.pdf [firstpage_image] =>[orig_patent_app_number] => 11641984 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/641984
Adjustable resistance Dec 18, 2006 Issued
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