
Thienvu V. Tran
Supervisory Patent Examiner (ID: 17040, Phone: (571)270-1276 , Office: P/2836 )
| Most Active Art Unit | 2819 |
| Art Unit(s) | 2819, 2836, 2844, 2839, 2838 |
| Total Applications | 548 |
| Issued Applications | 464 |
| Pending Applications | 2 |
| Abandoned Applications | 87 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 9778867
[patent_doc_number] => 08854076
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-10-07
[patent_title] => 'Single event transient direct measurement methodology and circuit'
[patent_app_type] => utility
[patent_app_number] => 13/549225
[patent_app_country] => US
[patent_app_date] => 2012-07-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 8
[patent_no_of_words] => 3335
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 71
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13549225
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/549225 | Single event transient direct measurement methodology and circuit | Jul 12, 2012 | Issued |
Array
(
[id] => 9196324
[patent_doc_number] => 20130335639
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-12-19
[patent_title] => 'Configurable Buffer For An Integrated Circuit'
[patent_app_type] => utility
[patent_app_number] => 13/526060
[patent_app_country] => US
[patent_app_date] => 2012-06-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3980
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13526060
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/526060 | Configurable buffer for an integrated circuit | Jun 17, 2012 | Issued |
Array
(
[id] => 9958883
[patent_doc_number] => 09007095
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-04-14
[patent_title] => 'Efficient non-integral multi-height standard cell placement'
[patent_app_type] => utility
[patent_app_number] => 13/467275
[patent_app_country] => US
[patent_app_date] => 2012-05-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 9
[patent_no_of_words] => 4698
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13467275
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/467275 | Efficient non-integral multi-height standard cell placement | May 8, 2012 | Issued |
Array
(
[id] => 10005665
[patent_doc_number] => 09049773
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-06-02
[patent_title] => 'Digital controller for an electronic ballast'
[patent_app_type] => utility
[patent_app_number] => 13/459562
[patent_app_country] => US
[patent_app_date] => 2012-04-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 24
[patent_no_of_words] => 6145
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 109
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13459562
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/459562 | Digital controller for an electronic ballast | Apr 29, 2012 | Issued |
Array
(
[id] => 8520198
[patent_doc_number] => 20120319606
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-12-20
[patent_title] => 'FLUORESCENT TUBE DRIVING DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/459252
[patent_app_country] => US
[patent_app_date] => 2012-04-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 4486
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13459252
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/459252 | Fluorescent tube driving device | Apr 29, 2012 | Issued |
Array
(
[id] => 8487291
[patent_doc_number] => 20120286698
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-11-15
[patent_title] => 'Product Display System, Profile Assembly For A Product Display System, And Method For Illuminating A Product'
[patent_app_type] => utility
[patent_app_number] => 13/454365
[patent_app_country] => US
[patent_app_date] => 2012-04-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 7082
[patent_no_of_claims] => 34
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13454365
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/454365 | Product display system, profile assembly for a product display system, and method for illuminating a product | Apr 23, 2012 | Issued |
Array
(
[id] => 8275509
[patent_doc_number] => 20120169372
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-07-05
[patent_title] => 'DIFFERENTIAL LOGIC CIRCUIT, FREQUENCY DIVIDER, AND FREQUENCY SYNTHESIZER'
[patent_app_type] => utility
[patent_app_number] => 13/421653
[patent_app_country] => US
[patent_app_date] => 2012-03-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 19
[patent_no_of_words] => 14411
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13421653
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/421653 | DIFFERENTIAL LOGIC CIRCUIT, FREQUENCY DIVIDER, AND FREQUENCY SYNTHESIZER | Mar 14, 2012 | Abandoned |
Array
(
[id] => 10871142
[patent_doc_number] => 08896346
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2014-11-25
[patent_title] => 'Self-modifying FPGA for anti-tamper applications'
[patent_app_type] => utility
[patent_app_number] => 13/421052
[patent_app_country] => US
[patent_app_date] => 2012-03-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 10306
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 131
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13421052
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/421052 | Self-modifying FPGA for anti-tamper applications | Mar 14, 2012 | Issued |
Array
(
[id] => 9750451
[patent_doc_number] => 08841934
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-09-23
[patent_title] => 'Hybrid frequency compensation network'
[patent_app_type] => utility
[patent_app_number] => 13/406788
[patent_app_country] => US
[patent_app_date] => 2012-02-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 850
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 87
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13406788
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/406788 | Hybrid frequency compensation network | Feb 27, 2012 | Issued |
Array
(
[id] => 9230550
[patent_doc_number] => RE044617
[patent_country] => US
[patent_kind] => E1
[patent_issue_date] => 2013-12-03
[patent_title] => 'On-die termination device'
[patent_app_type] => reissue
[patent_app_number] => 13/371741
[patent_app_country] => US
[patent_app_date] => 2012-02-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 19
[patent_no_of_words] => 8966
[patent_no_of_claims] => 29
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 115
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13371741
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/371741 | On-die termination device | Feb 12, 2012 | Issued |
Array
(
[id] => 9704733
[patent_doc_number] => 08829805
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-09-09
[patent_title] => 'Variable load circuits for use with lighting control devices'
[patent_app_type] => utility
[patent_app_number] => 13/369646
[patent_app_country] => US
[patent_app_date] => 2012-02-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 9
[patent_no_of_words] => 5296
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 153
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13369646
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/369646 | Variable load circuits for use with lighting control devices | Feb 8, 2012 | Issued |
Array
(
[id] => 8205962
[patent_doc_number] => 20120126782
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-05-24
[patent_title] => 'LOW VOLTAGE ELECTRONIC MODULE INTERFACE'
[patent_app_type] => utility
[patent_app_number] => 13/359881
[patent_app_country] => US
[patent_app_date] => 2012-01-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3451
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0126/20120126782.pdf
[firstpage_image] =>[orig_patent_app_number] => 13359881
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/359881 | Low voltage electronic module interface | Jan 26, 2012 | Issued |
Array
(
[id] => 9628516
[patent_doc_number] => 08798206
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-08-05
[patent_title] => 'Vital digital input'
[patent_app_type] => utility
[patent_app_number] => 13/347741
[patent_app_country] => US
[patent_app_date] => 2012-01-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4368
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 137
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13347741
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/347741 | Vital digital input | Jan 10, 2012 | Issued |
Array
(
[id] => 8275504
[patent_doc_number] => 20120169374
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-07-05
[patent_title] => 'APPARATUS AND METHOD FOR OBTAINING MAXIMUM VALUE AND MINIMUM VALUE IN PLURALITY OF DIGITAL INPUT SIGNALS'
[patent_app_type] => utility
[patent_app_number] => 13/339394
[patent_app_country] => US
[patent_app_date] => 2011-12-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3347
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13339394
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/339394 | Apparatus and method for obtaining maximum value and minimum value in plurality of digital input signals | Dec 28, 2011 | Issued |
Array
(
[id] => 9240035
[patent_doc_number] => 08604830
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-12-10
[patent_title] => 'Semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 13/338412
[patent_app_country] => US
[patent_app_date] => 2011-12-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 16
[patent_no_of_words] => 9806
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 75
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13338412
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/338412 | Semiconductor device | Dec 27, 2011 | Issued |
Array
(
[id] => 8797771
[patent_doc_number] => 08436647
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-05-07
[patent_title] => 'Pipeline power gating for gates with multiple destinations'
[patent_app_type] => utility
[patent_app_number] => 13/335104
[patent_app_country] => US
[patent_app_date] => 2011-12-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 10
[patent_no_of_words] => 4011
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 182
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13335104
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/335104 | Pipeline power gating for gates with multiple destinations | Dec 21, 2011 | Issued |
Array
(
[id] => 8812473
[patent_doc_number] => 20130113518
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-05-09
[patent_title] => 'MAJORITY DECISION CIRCUIT'
[patent_app_type] => utility
[patent_app_number] => 13/334355
[patent_app_country] => US
[patent_app_date] => 2011-12-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 9361
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13334355
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/334355 | Majority decision circuit | Dec 21, 2011 | Issued |
Array
(
[id] => 8275493
[patent_doc_number] => 20120169370
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-07-05
[patent_title] => 'SYSTEM AND PACKAGE INCLUDING PLURAL CHIPS AND CONTROLLER'
[patent_app_type] => utility
[patent_app_number] => 13/334038
[patent_app_country] => US
[patent_app_date] => 2011-12-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3165
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13334038
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/334038 | System and package including plural chips and controller | Dec 20, 2011 | Issued |
Array
(
[id] => 8730826
[patent_doc_number] => 20130076395
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-03-28
[patent_title] => 'SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/333927
[patent_app_country] => US
[patent_app_date] => 2011-12-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 7158
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13333927
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/333927 | Semiconductor device including data output circuit supporting pre-emphasis operation | Dec 20, 2011 | Issued |
Array
(
[id] => 8765427
[patent_doc_number] => 20130093464
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-04-18
[patent_title] => 'SIGNAL TRANSFER CIRCUIT'
[patent_app_type] => utility
[patent_app_number] => 13/334007
[patent_app_country] => US
[patent_app_date] => 2011-12-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 4593
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13334007
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/334007 | SIGNAL TRANSFER CIRCUIT | Dec 20, 2011 | Abandoned |