
Thienvu V. Tran
Supervisory Patent Examiner (ID: 17040, Phone: (571)270-1276 , Office: P/2836 )
| Most Active Art Unit | 2819 |
| Art Unit(s) | 2819, 2836, 2844, 2839, 2838 |
| Total Applications | 548 |
| Issued Applications | 464 |
| Pending Applications | 2 |
| Abandoned Applications | 87 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 8018571
[patent_doc_number] => 08138793
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2012-03-20
[patent_title] => 'Integrated circuit and method for operating the same'
[patent_app_type] => utility
[patent_app_number] => 12/981325
[patent_app_country] => US
[patent_app_date] => 2010-12-29
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[pdf_file] => patents/08/138/08138793.pdf
[firstpage_image] =>[orig_patent_app_number] => 12981325
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/981325 | Integrated circuit and method for operating the same | Dec 28, 2010 | Issued |
Array
(
[id] => 9583159
[patent_doc_number] => 08773162
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-07-08
[patent_title] => 'Communication cell for an integrated circuit, chip comprising said communication cell, electronic system including the chip, and test apparatus'
[patent_app_type] => utility
[patent_app_number] => 12/980832
[patent_app_country] => US
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12980832
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/980832 | Communication cell for an integrated circuit, chip comprising said communication cell, electronic system including the chip, and test apparatus | Dec 28, 2010 | Issued |
Array
(
[id] => 8262385
[patent_doc_number] => 20120161811
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-06-28
[patent_title] => 'DRIVER CIRCUIT CORRECTION ARM DECOUPLING RESISTANCE IN STEADY STATE MODE'
[patent_app_type] => utility
[patent_app_number] => 12/979336
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/979336 | Driver circuit correction arm decoupling resistance in steady state mode | Dec 27, 2010 | Issued |
Array
(
[id] => 8262383
[patent_doc_number] => 20120161812
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-06-28
[patent_title] => 'LOGIC CIRCUIT WITHOUT ENHANCEMENT MODE TRANSISTORS'
[patent_app_type] => utility
[patent_app_number] => 12/980264
[patent_app_country] => US
[patent_app_date] => 2010-12-28
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/980264 | Logic circuit without enhancement mode transistors | Dec 27, 2010 | Issued |
Array
(
[id] => 8262429
[patent_doc_number] => 20120161861
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[patent_kind] => A1
[patent_issue_date] => 2012-06-28
[patent_title] => 'CAPACITOR CELL SUPPORTING CIRCUIT OPERATION AT HIGHER-VOLTAGES WHILE EMPLOYING CAPACITORS DESIGNED FOR LOWER VOLTAGES'
[patent_app_type] => utility
[patent_app_number] => 12/979387
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[patent_app_date] => 2010-12-28
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/979387 | Capacitor cell supporting circuit operation at higher-voltages while employing capacitors designed for lower voltages | Dec 27, 2010 | Issued |
Array
(
[id] => 4473141
[patent_doc_number] => 07944237
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-05-17
[patent_title] => 'Adjustable hold flip flop and method for adjusting hold requirements'
[patent_app_type] => utility
[patent_app_number] => 12/969424
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[pdf_file] => patents/07/944/07944237.pdf
[firstpage_image] =>[orig_patent_app_number] => 12969424
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/969424 | Adjustable hold flip flop and method for adjusting hold requirements | Dec 14, 2010 | Issued |
Array
(
[id] => 7546126
[patent_doc_number] => 08054100
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2011-11-08
[patent_title] => 'Line transceiver apparatus for multiple transmission standards'
[patent_app_type] => utility
[patent_app_number] => 12/958410
[patent_app_country] => US
[patent_app_date] => 2010-12-02
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[pdf_file] => patents/08/054/08054100.pdf
[firstpage_image] =>[orig_patent_app_number] => 12958410
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/958410 | Line transceiver apparatus for multiple transmission standards | Dec 1, 2010 | Issued |
Array
(
[id] => 7753054
[patent_doc_number] => 08111083
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2012-02-07
[patent_title] => 'Quantum processor'
[patent_app_type] => utility
[patent_app_number] => 12/957940
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[pdf_file] => patents/08/111/08111083.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/957940 | Quantum processor | Nov 30, 2010 | Issued |
Array
(
[id] => 6138478
[patent_doc_number] => 20110128042
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-06-02
[patent_title] => 'Universal IO Unit, Associated Apparatus and Method'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/957520 | Universal IO unit, associated apparatus and method | Nov 30, 2010 | Issued |
Array
(
[id] => 8470635
[patent_doc_number] => 08299817
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[patent_kind] => B2
[patent_issue_date] => 2012-10-30
[patent_title] => 'Circuit and method for adding dither to vertical droop compensation using linear feedback shift registers'
[patent_app_type] => utility
[patent_app_number] => 12/957046
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[patent_app_date] => 2010-11-30
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Array
(
[id] => 8556011
[patent_doc_number] => 08330486
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[patent_issue_date] => 2012-12-11
[patent_title] => 'Data line termination circuit'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/956416 | Data line termination circuit | Nov 29, 2010 | Issued |
Array
(
[id] => 7998325
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[patent_issue_date] => 2011-12-20
[patent_title] => 'Self restoring logic'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/954149 | Self restoring logic | Nov 23, 2010 | Issued |
Array
(
[id] => 8206131
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[patent_issue_date] => 2012-05-24
[patent_title] => 'HIGH-SPEED STATIC XOR CIRCUIT'
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[firstpage_image] =>[orig_patent_app_number] => 12953010
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/953010 | High-speed static XOR circuit | Nov 22, 2010 | Issued |
Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/953038 | Shift register and semiconductor display device | Nov 22, 2010 | Issued |
Array
(
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[patent_title] => 'IMAGE PROCESSING APPARATUS, CONTROL METHOD, AND STORAGE MEDIUM'
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Array
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Array
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Array
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Array
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Array
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