Search

Thinh T. Nguyen

Examiner (ID: 17352, Phone: (571)272-1790 , Office: P/2897 )

Most Active Art Unit
2897
Art Unit(s)
2897, 2818
Total Applications
2487
Issued Applications
2130
Pending Applications
85
Abandoned Applications
277

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17590869 [patent_doc_number] => 11329146 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-10 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 17/386462 [patent_app_country] => US [patent_app_date] => 2021-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 32 [patent_no_of_words] => 14204 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17386462 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/386462
Semiconductor device Jul 26, 2021 Issued
Array ( [id] => 18249050 [patent_doc_number] => 11605648 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-03-14 [patent_title] => Semiconductor structure and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 17/383283 [patent_app_country] => US [patent_app_date] => 2021-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 3009 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17383283 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/383283
Semiconductor structure and manufacturing method thereof Jul 21, 2021 Issued
Array ( [id] => 17217848 [patent_doc_number] => 20210351186 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-11 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/380830 [patent_app_country] => US [patent_app_date] => 2021-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10379 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17380830 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/380830
Semiconductor device and method of manufacturing the same Jul 19, 2021 Issued
Array ( [id] => 18219677 [patent_doc_number] => 11594627 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-28 [patent_title] => Semiconductor structure having both enhancement mode group III-N high electron mobility transistors and depletion mode group III-N high electron mobility transistors [patent_app_type] => utility [patent_app_number] => 17/380379 [patent_app_country] => US [patent_app_date] => 2021-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 32 [patent_no_of_words] => 9563 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17380379 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/380379
Semiconductor structure having both enhancement mode group III-N high electron mobility transistors and depletion mode group III-N high electron mobility transistors Jul 19, 2021 Issued
Array ( [id] => 18840188 [patent_doc_number] => 11848268 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-19 [patent_title] => Thin film resistor with punch-through vias [patent_app_type] => utility [patent_app_number] => 17/378203 [patent_app_country] => US [patent_app_date] => 2021-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 9044 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17378203 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/378203
Thin film resistor with punch-through vias Jul 15, 2021 Issued
Array ( [id] => 18145085 [patent_doc_number] => 20230018940 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-19 [patent_title] => BARIUM TITANATE FILMS HAVING REDUCED INTERFACIAL STRAIN [patent_app_type] => utility [patent_app_number] => 17/377131 [patent_app_country] => US [patent_app_date] => 2021-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5137 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17377131 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/377131
Barium titanate films having reduced interfacial strain Jul 14, 2021 Issued
Array ( [id] => 18073731 [patent_doc_number] => 11532571 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-20 [patent_title] => Vertically-aligned and conductive dummies in integrated circuit layers for capacitance reduction and bias independence and methods of manufacture [patent_app_type] => utility [patent_app_number] => 17/369563 [patent_app_country] => US [patent_app_date] => 2021-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 9053 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17369563 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/369563
Vertically-aligned and conductive dummies in integrated circuit layers for capacitance reduction and bias independence and methods of manufacture Jul 6, 2021 Issued
Array ( [id] => 17188936 [patent_doc_number] => 20210335821 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-28 [patent_title] => METHOD FOR FORMING INTEGRATED CIRCUIT [patent_app_type] => utility [patent_app_number] => 17/368725 [patent_app_country] => US [patent_app_date] => 2021-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7779 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17368725 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/368725
Method for forming integrated circuit Jul 5, 2021 Issued
Array ( [id] => 18000933 [patent_doc_number] => 11502044 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-15 [patent_title] => Methods of manufacturing semiconductor device and semiconductor device [patent_app_type] => utility [patent_app_number] => 17/364682 [patent_app_country] => US [patent_app_date] => 2021-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 6938 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17364682 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/364682
Methods of manufacturing semiconductor device and semiconductor device Jun 29, 2021 Issued
Array ( [id] => 17764822 [patent_doc_number] => 20220238435 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-28 [patent_title] => MULTILAYER-TYPE ON-CHIP INDUCTOR STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/342684 [patent_app_country] => US [patent_app_date] => 2021-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9119 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17342684 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/342684
Multilayer-type on-chip inductor structure Jun 8, 2021 Issued
Array ( [id] => 17886694 [patent_doc_number] => 20220302172 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-22 [patent_title] => DIFFERENT DIFFUSION BREAK STRUCTURES FOR THREE-DIMENSIONAL STACKED SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/335834 [patent_app_country] => US [patent_app_date] => 2021-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11407 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17335834 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/335834
Different diffusion break structures for three-dimensional stacked semiconductor device May 31, 2021 Issued
Array ( [id] => 17100239 [patent_doc_number] => 20210288030 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-16 [patent_title] => Integrated Circuit Package and Method [patent_app_type] => utility [patent_app_number] => 17/334025 [patent_app_country] => US [patent_app_date] => 2021-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12701 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17334025 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/334025
Integrated circuit package and method May 27, 2021 Issued
Array ( [id] => 17100261 [patent_doc_number] => 20210288052 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-16 [patent_title] => METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE AND THE SAME [patent_app_type] => utility [patent_app_number] => 17/334397 [patent_app_country] => US [patent_app_date] => 2021-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9650 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17334397 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/334397
Method for fabricating a semiconductor device and the same May 27, 2021 Issued
Array ( [id] => 17085472 [patent_doc_number] => 20210280479 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-09 [patent_title] => Component Carrier With a Stepped Cavity and a Stepped Component Assembly Embedded Within the Stepped Cavity [patent_app_type] => utility [patent_app_number] => 17/303264 [patent_app_country] => US [patent_app_date] => 2021-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11244 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17303264 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/303264
Component carrier with a stepped cavity and a stepped component assembly embedded within the stepped cavity May 24, 2021 Issued
Array ( [id] => 17509277 [patent_doc_number] => 20220102380 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-31 [patent_title] => CONNECTIONS FROM BURIED INTERCONNECTS TO DEVICE TERMINALS IN MULTIPLE STACKED DEVICES STRUCTURES [patent_app_type] => utility [patent_app_number] => 17/326449 [patent_app_country] => US [patent_app_date] => 2021-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7369 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17326449 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/326449
Connections from buried interconnects to device terminals in multiple stacked devices structures May 20, 2021 Issued
Array ( [id] => 18263221 [patent_doc_number] => 11610930 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-03-21 [patent_title] => Transmission circuit and electronic device [patent_app_type] => utility [patent_app_number] => 17/325418 [patent_app_country] => US [patent_app_date] => 2021-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 19 [patent_no_of_words] => 12252 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17325418 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/325418
Transmission circuit and electronic device May 19, 2021 Issued
Array ( [id] => 17738163 [patent_doc_number] => 20220223625 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-14 [patent_title] => BREAKDOWN VOLTAGE CAPABILITY OF HIGH VOLTAGE DEVICE [patent_app_type] => utility [patent_app_number] => 17/323016 [patent_app_country] => US [patent_app_date] => 2021-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12053 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17323016 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/323016
Breakdown voltage capability of high voltage device May 17, 2021 Issued
Array ( [id] => 18431792 [patent_doc_number] => 11677024 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-13 [patent_title] => FeFET transistor [patent_app_type] => utility [patent_app_number] => 17/323545 [patent_app_country] => US [patent_app_date] => 2021-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 2985 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17323545 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/323545
FeFET transistor May 17, 2021 Issued
Array ( [id] => 17941735 [patent_doc_number] => 11476194 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-10-18 [patent_title] => Method for fabricating semiconductor device [patent_app_type] => utility [patent_app_number] => 17/316798 [patent_app_country] => US [patent_app_date] => 2021-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 37 [patent_no_of_words] => 9829 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17316798 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/316798
Method for fabricating semiconductor device May 10, 2021 Issued
Array ( [id] => 17716628 [patent_doc_number] => 11380627 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-07-05 [patent_title] => Radiofrequency device [patent_app_type] => utility [patent_app_number] => 17/308038 [patent_app_country] => US [patent_app_date] => 2021-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5051 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17308038 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/308038
Radiofrequency device May 3, 2021 Issued
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