
Thinh T. Nguyen
Examiner (ID: 17352, Phone: (571)272-1790 , Office: P/2897 )
| Most Active Art Unit | 2897 |
| Art Unit(s) | 2897, 2818 |
| Total Applications | 2487 |
| Issued Applications | 2130 |
| Pending Applications | 85 |
| Abandoned Applications | 277 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 17986173
[patent_doc_number] => 20220352210
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-11-03
[patent_title] => SWITCHES IN BULK SUBSTRATE
[patent_app_type] => utility
[patent_app_number] => 17/306078
[patent_app_country] => US
[patent_app_date] => 2021-05-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4212
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 65
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17306078
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/306078 | Switches in bulk substrate | May 2, 2021 | Issued |
Array
(
[id] => 17485946
[patent_doc_number] => 20220093450
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-03-24
[patent_title] => METHOD AND APPARATUS FOR MAKING SHALLOW TRENCH STRUCTURE
[patent_app_type] => utility
[patent_app_number] => 17/246588
[patent_app_country] => US
[patent_app_date] => 2021-04-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4236
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -9
[patent_words_short_claim] => 97
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17246588
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/246588 | Method and apparatus for making shallow trench structure | Apr 29, 2021 | Issued |
Array
(
[id] => 17985971
[patent_doc_number] => 20220352008
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-11-03
[patent_title] => SEMICONDUCTOR DEVICE STRUCTURE WITH MULTIPLE LINERS AND METHOD FOR FORMING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/245795
[patent_app_country] => US
[patent_app_date] => 2021-04-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8094
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -6
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17245795
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/245795 | Semiconductor device structure with multiple liners and method for forming the same | Apr 29, 2021 | Issued |
Array
(
[id] => 17985924
[patent_doc_number] => 20220351961
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-11-03
[patent_title] => WET CLEAN PROCESS FOR FABRICATING SEMICONDUCTOR DEVICES
[patent_app_type] => utility
[patent_app_number] => 17/243159
[patent_app_country] => US
[patent_app_date] => 2021-04-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4065
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -13
[patent_words_short_claim] => 123
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17243159
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/243159 | Wet clean process for fabricating semiconductor devices | Apr 27, 2021 | Issued |
Array
(
[id] => 16995399
[patent_doc_number] => 20210233819
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-07-29
[patent_title] => DEEP TRENCH ISOLATION STRUCTURE AND METHOD OF MAKING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/233232
[patent_app_country] => US
[patent_app_date] => 2021-04-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5074
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 129
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17233232
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/233232 | Deep trench isolation structure and method of making the same | Apr 15, 2021 | Issued |
Array
(
[id] => 17971349
[patent_doc_number] => 11488897
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-11-01
[patent_title] => Integrated circuit package and method
[patent_app_type] => utility
[patent_app_number] => 17/227608
[patent_app_country] => US
[patent_app_date] => 2021-04-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 26
[patent_figures_cnt] => 26
[patent_no_of_words] => 9413
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 86
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17227608
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/227608 | Integrated circuit package and method | Apr 11, 2021 | Issued |
Array
(
[id] => 16981683
[patent_doc_number] => 20210225920
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-07-22
[patent_title] => IMAGE SENSOR HAVING STRESS RELEASING STRUCTURE AND METHOD OF FORMING SAME
[patent_app_type] => utility
[patent_app_number] => 17/225701
[patent_app_country] => US
[patent_app_date] => 2021-04-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 16121
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 57
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17225701
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/225701 | Image sensor having stress releasing structure and method of forming same | Apr 7, 2021 | Issued |
Array
(
[id] => 17638262
[patent_doc_number] => 11348998
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2022-05-31
[patent_title] => Reconfigurable graphene devices via electrical double layer gating
[patent_app_type] => utility
[patent_app_number] => 17/222400
[patent_app_country] => US
[patent_app_date] => 2021-04-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 3692
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 107
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17222400
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/222400 | Reconfigurable graphene devices via electrical double layer gating | Apr 4, 2021 | Issued |
Array
(
[id] => 17174096
[patent_doc_number] => 20210327767
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-10-21
[patent_title] => SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING SAME
[patent_app_type] => utility
[patent_app_number] => 17/218975
[patent_app_country] => US
[patent_app_date] => 2021-03-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8486
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17218975
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/218975 | Semiconductor structure and method for forming same | Mar 30, 2021 | Issued |
Array
(
[id] => 17130470
[patent_doc_number] => 20210305239
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-09-30
[patent_title] => MICROWAVE INTEGRATED CIRCUITS INCLUDING GALLIUM-NITRIDE DEVICES ON SILICON
[patent_app_type] => utility
[patent_app_number] => 17/213900
[patent_app_country] => US
[patent_app_date] => 2021-03-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9596
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 70
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17213900
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/213900 | Microwave integrated circuits including gallium-nitride devices on silicon | Mar 25, 2021 | Issued |
Array
(
[id] => 18263253
[patent_doc_number] => 11610962
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-03-21
[patent_title] => Semiconductor device and method of manufacturing semiconductor device
[patent_app_type] => utility
[patent_app_number] => 17/211915
[patent_app_country] => US
[patent_app_date] => 2021-03-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 22
[patent_no_of_words] => 6123
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 69
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17211915
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/211915 | Semiconductor device and method of manufacturing semiconductor device | Mar 24, 2021 | Issued |
Array
(
[id] => 16953518
[patent_doc_number] => 20210212210
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-07-08
[patent_title] => INTERPOSER PRINTED CIRCUIT BOARDS FOR POWER MODULES
[patent_app_type] => utility
[patent_app_number] => 17/209591
[patent_app_country] => US
[patent_app_date] => 2021-03-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5589
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -13
[patent_words_short_claim] => 108
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17209591
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/209591 | Interposer printed circuit boards for power modules | Mar 22, 2021 | Issued |
Array
(
[id] => 17716746
[patent_doc_number] => 11380746
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-07-05
[patent_title] => Organic light emitting diode display device
[patent_app_type] => utility
[patent_app_number] => 17/208571
[patent_app_country] => US
[patent_app_date] => 2021-03-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 43
[patent_figures_cnt] => 43
[patent_no_of_words] => 21586
[patent_no_of_claims] => 29
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 104
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17208571
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/208571 | Organic light emitting diode display device | Mar 21, 2021 | Issued |
Array
(
[id] => 17683483
[patent_doc_number] => 11367748
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-06-21
[patent_title] => Nonvolatile storage device
[patent_app_type] => utility
[patent_app_number] => 17/206364
[patent_app_country] => US
[patent_app_date] => 2021-03-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 7
[patent_no_of_words] => 2767
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 262
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17206364
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/206364 | Nonvolatile storage device | Mar 18, 2021 | Issued |
Array
(
[id] => 18016277
[patent_doc_number] => 11508583
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-11-22
[patent_title] => Selective high-k formation in gate-last process
[patent_app_type] => utility
[patent_app_number] => 17/203306
[patent_app_country] => US
[patent_app_date] => 2021-03-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 22
[patent_no_of_words] => 7655
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 62
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17203306
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/203306 | Selective high-k formation in gate-last process | Mar 15, 2021 | Issued |
Array
(
[id] => 17403012
[patent_doc_number] => 20220045103
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-02-10
[patent_title] => SEMICONDUCTOR DEVICES HAVING MULTI-CHANNEL ACTIVE REGIONS AND METHODS OF FORMING SAME
[patent_app_type] => utility
[patent_app_number] => 17/201494
[patent_app_country] => US
[patent_app_date] => 2021-03-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9760
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17201494
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/201494 | Semiconductor devices having multi-channel active regions and methods of forming same | Mar 14, 2021 | Issued |
Array
(
[id] => 17652899
[patent_doc_number] => 11355641
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-06-07
[patent_title] => Merged source/drain features
[patent_app_type] => utility
[patent_app_number] => 17/201147
[patent_app_country] => US
[patent_app_date] => 2021-03-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 7639
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 113
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17201147
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/201147 | Merged source/drain features | Mar 14, 2021 | Issued |
Array
(
[id] => 17115669
[patent_doc_number] => 20210296266
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-09-23
[patent_title] => RF SUBSTRATE WITH JUNCTIONS HAVING AN IMPROVED LAYOUT
[patent_app_type] => utility
[patent_app_number] => 17/199610
[patent_app_country] => US
[patent_app_date] => 2021-03-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6272
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17199610
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/199610 | RF substrate with junctions having an improved layout | Mar 11, 2021 | Issued |
Array
(
[id] => 17825930
[patent_doc_number] => 11430886
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-08-30
[patent_title] => Semiconductor device and semiconductor memory device
[patent_app_type] => utility
[patent_app_number] => 17/198682
[patent_app_country] => US
[patent_app_date] => 2021-03-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 14
[patent_no_of_words] => 6425
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 201
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17198682
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/198682 | Semiconductor device and semiconductor memory device | Mar 10, 2021 | Issued |
Array
(
[id] => 17700381
[patent_doc_number] => 11374116
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-06-28
[patent_title] => Semiconductor devices
[patent_app_type] => utility
[patent_app_number] => 17/197423
[patent_app_country] => US
[patent_app_date] => 2021-03-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 14
[patent_no_of_words] => 6461
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 164
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17197423
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/197423 | Semiconductor devices | Mar 9, 2021 | Issued |