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Array ( [id] => 19391480 [patent_doc_number] => 20240281350 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-22 [patent_title] => TESTING FOR MEMORY DEVICES USING DEDICATED COMMAND AND ADDRESS CHANNELS [patent_app_type] => utility [patent_app_number] => 18/581189 [patent_app_country] => US [patent_app_date] => 2024-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14053 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18581189 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19695344 [patent_doc_number] => 20250013889 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-09 [patent_title] => Hybrid Quantum-Classical Computer for Bayesian Inference with Engineered Likelihood Functions for Robust Amplitude Estimation [patent_app_type] => utility [patent_app_number] => 18/444157 [patent_app_country] => US [patent_app_date] => 2024-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 32872 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18444157 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20167643 [patent_doc_number] => 20250259690 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-08-14 [patent_title] => USING BUILT-IN SELF TEST OR TEST RESULTS TO IDENTIFY WEAK MEMORY BITS AND ENABLE ASSIST CIRCUITS WHEN NECESSARY [patent_app_type] => utility [patent_app_number] => 18/439316 [patent_app_country] => US [patent_app_date] => 2024-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4617 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18439316 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19383523 [patent_doc_number] => 20240273393 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-15 [patent_title] => FAST MINIMUM-WEIGHT PERFECT MATCHING (MWPM) DECODER FOR QUANTUM ERROR CORRECTION [patent_app_type] => utility [patent_app_number] => 18/437441 [patent_app_country] => US [patent_app_date] => 2024-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4377 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18437441 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19383129 [patent_doc_number] => 20240272999 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-15 [patent_title] => SYSTEM, METHOD, AND COMPUTER-READABLE STORAGE MEDIUM FOR SYSTEM-ON-CHIP VERIFICATION [patent_app_type] => utility [patent_app_number] => 18/436335 [patent_app_country] => US [patent_app_date] => 2024-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8574 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18436335 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19191171 [patent_doc_number] => 20240170084 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-23 [patent_title] => SEMICONDUCTOR DEVICE, VEHICLE-MOUNTED APPARATUS, AND CONSUMER APPARATUS [patent_app_type] => utility [patent_app_number] => 18/427383 [patent_app_country] => US [patent_app_date] => 2024-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4126 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18427383 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19362870 [patent_doc_number] => 20240264904 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-08 [patent_title] => LOGICAL COUNTERS FOR A MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 18/421444 [patent_app_country] => US [patent_app_date] => 2024-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10369 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18421444 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19174292 [patent_doc_number] => 20240160266 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-16 [patent_title] => SELECTIVELY USING HEROIC DATA RECOVERY METHODS IN A MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/421389 [patent_app_country] => US [patent_app_date] => 2024-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9350 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18421389 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19144276 [patent_doc_number] => 20240143188 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-02 [patent_title] => DATA PROCESSING METHOD AND APPARATUS, DEVICE, AND READABLE STORAGE MEDIUM [patent_app_type] => utility [patent_app_number] => 18/407611 [patent_app_country] => US [patent_app_date] => 2024-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9837 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18407611 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19303424 [patent_doc_number] => 20240232004 [patent_country] => US [patent_kind] => A9 [patent_issue_date] => 2024-07-11 [patent_title] => STORAGE DEVICE AND OPERATING METHOD OF STORAGE CONTROLLER [patent_app_type] => utility [patent_app_number] => 18/400256 [patent_app_country] => US [patent_app_date] => 2023-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17377 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18400256 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19303432 [patent_doc_number] => 20240232012 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-11 [patent_title] => MEMORY DEVICE AND OPERATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/399864 [patent_app_country] => US [patent_app_date] => 2023-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16074 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18399864 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19303424 [patent_doc_number] => 20240232004 [patent_country] => US [patent_kind] => A9 [patent_issue_date] => 2024-07-11 [patent_title] => STORAGE DEVICE AND OPERATING METHOD OF STORAGE CONTROLLER [patent_app_type] => utility [patent_app_number] => 18/400256 [patent_app_country] => US [patent_app_date] => 2023-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17377 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18400256 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19220410 [patent_doc_number] => 20240185114 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-06 [patent_title] => TECHNIQUES FOR CONTROLLING SMALL ANGLE MoLMER-SoRENSEN GATES AND FOR HANDLING ASYMMETRIC SPAM ERRORS [patent_app_type] => utility [patent_app_number] => 18/543790 [patent_app_country] => US [patent_app_date] => 2023-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9807 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18543790 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19907022 [patent_doc_number] => 12284044 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-22 [patent_title] => Method and apparatus for efficiently utilizing HARQ processes for semi-persistent and dynamic data transmissions [patent_app_type] => utility [patent_app_number] => 18/531061 [patent_app_country] => US [patent_app_date] => 2023-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 0 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18531061 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19069525 [patent_doc_number] => 20240103951 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-28 [patent_title] => ERROR RATE INTERRUPTS IN HARDWARE FOR HIGH-SPEED SIGNALING INTERCONNECT [patent_app_type] => utility [patent_app_number] => 18/526621 [patent_app_country] => US [patent_app_date] => 2023-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11806 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18526621 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19711716 [patent_doc_number] => 20250021858 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-16 [patent_title] => METHOD AND APPARATUS FOR DETERMINING RECOVERY OPERATOR USING TOPOLOGICAL STRUCTURE OF ROTATED SURFACE CODE [patent_app_type] => utility [patent_app_number] => 18/525914 [patent_app_country] => US [patent_app_date] => 2023-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4650 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18525914 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19891391 [patent_doc_number] => 20250116703 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-10 [patent_title] => SYSTEM AND METHOD FOR GENERATING CLOCK PULSES FOR AT-SPEED TESTING OF INTEGRATED CIRCUITS [patent_app_type] => utility [patent_app_number] => 18/522725 [patent_app_country] => US [patent_app_date] => 2023-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15404 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18522725 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19924574 [patent_doc_number] => 12298854 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-13 [patent_title] => Storing data objects in a storage network with multiple memory types [patent_app_type] => utility [patent_app_number] => 18/520755 [patent_app_country] => US [patent_app_date] => 2023-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 61 [patent_figures_cnt] => 70 [patent_no_of_words] => 35537 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18520755 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19204802 [patent_doc_number] => 20240176701 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-30 [patent_title] => ENHANCED READ PERFORMANCE FOR MEMORY DATA WORD DECODING USING POWER ALLOCATION BASED ON ERROR PATTERN DETECTION [patent_app_type] => utility [patent_app_number] => 18/519458 [patent_app_country] => US [patent_app_date] => 2023-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16705 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18519458 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19925312 [patent_doc_number] => 12299598 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-13 [patent_title] => Systems and methods for ensuring safe, norm-conforming and ethical behavior of intelligent systems [patent_app_type] => utility [patent_app_number] => 18/510735 [patent_app_country] => US [patent_app_date] => 2023-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6958 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 229 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18510735 [rel_patent_id] =>[rel_patent_doc_number] =>)