Search

Thomas C. Lee

Examiner (ID: 3802)

Most Active Art Unit
2302
Art Unit(s)
2317, 2302, 2185, 2782, 2307, 2115, 2182
Total Applications
694
Issued Applications
429
Pending Applications
17
Abandoned Applications
248

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19757802 [patent_doc_number] => 20250046367 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-06 [patent_title] => SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOF [patent_app_type] => utility [patent_app_number] => 18/582160 [patent_app_country] => US [patent_app_date] => 2024-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6921 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18582160 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/582160
SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOF Feb 19, 2024 Pending
Array ( [id] => 20564858 [patent_doc_number] => 12567472 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-03-03 [patent_title] => Memory device with boundary page search related to information recovery [patent_app_type] => utility [patent_app_number] => 18/521612 [patent_app_country] => US [patent_app_date] => 2023-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 12859 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 268 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18521612 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/521612
Memory device with boundary page search related to information recovery Nov 27, 2023 Issued
Array ( [id] => 19207987 [patent_doc_number] => 20240179886 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-30 [patent_title] => MEMORY-ELEMENT-INCLUDING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/517572 [patent_app_country] => US [patent_app_date] => 2023-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12008 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 309 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18517572 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/517572
MEMORY-ELEMENT-INCLUDING SEMICONDUCTOR DEVICE Nov 21, 2023 Abandoned
Array ( [id] => 20495187 [patent_doc_number] => 12537063 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-27 [patent_title] => Memory device [patent_app_type] => utility [patent_app_number] => 18/509250 [patent_app_country] => US [patent_app_date] => 2023-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 40 [patent_no_of_words] => 13170 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18509250 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/509250
Memory device Nov 13, 2023 Issued
Array ( [id] => 18789037 [patent_doc_number] => 20230377647 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-23 [patent_title] => Method for calculating a MAC operation in a 1S1R-type RRAM memory [patent_app_type] => utility [patent_app_number] => 18/321399 [patent_app_country] => US [patent_app_date] => 2023-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5132 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 380 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18321399 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/321399
Method for calculating a MAC operation in a 1S1R-type RRAM memory May 21, 2023 Pending
Array ( [id] => 20611033 [patent_doc_number] => 12586638 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-03-24 [patent_title] => Resistive memory and operating method thereof [patent_app_type] => utility [patent_app_number] => 18/317142 [patent_app_country] => US [patent_app_date] => 2023-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 0 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18317142 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/317142
Resistive memory and operating method thereof May 14, 2023 Issued
Array ( [id] => 18471740 [patent_doc_number] => 20230206026 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-29 [patent_title] => VERIFICATION OF A WEIGHT STORED IN A NON-VOLATILE MEMORY CELL IN A NEURAL NETWORK FOLLOWING A PROGRAMMING OPERATION [patent_app_type] => utility [patent_app_number] => 18/120360 [patent_app_country] => US [patent_app_date] => 2023-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8008 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18120360 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/120360
Verification of a weight stored in a non-volatile memory cell in a neural network following a programming operation Mar 9, 2023 Issued
Array ( [id] => 20002092 [patent_doc_number] => 20250140314 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-01 [patent_title] => SEMICONDUCTOR CIRCUIT, DRIVING METHOD, AND ELECTRONIC APPARATUS [patent_app_type] => utility [patent_app_number] => 18/694111 [patent_app_country] => US [patent_app_date] => 2022-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 36284 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 414 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18694111 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/694111
Semiconductor circuit, driving method, and electronic apparatus Sep 15, 2022 Issued
Array ( [id] => 17833674 [patent_doc_number] => 20220270978 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-25 [patent_title] => METHODS AND APPARATUSES TO FORM SELF-ALIGNED CAPS [patent_app_type] => utility [patent_app_number] => 17/742792 [patent_app_country] => US [patent_app_date] => 2022-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7403 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17742792 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/742792
METHODS AND APPARATUSES TO FORM SELF-ALIGNED CAPS May 11, 2022 Abandoned
Array ( [id] => 18935234 [patent_doc_number] => 11887672 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-30 [patent_title] => Nonvolatile memory device having a dummy bit line driver and operation method thereof [patent_app_type] => utility [patent_app_number] => 17/693013 [patent_app_country] => US [patent_app_date] => 2022-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 30 [patent_no_of_words] => 18024 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17693013 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/693013
Nonvolatile memory device having a dummy bit line driver and operation method thereof Mar 10, 2022 Issued
Array ( [id] => 18781986 [patent_doc_number] => 11823751 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-21 [patent_title] => Memory device and operation method thereof [patent_app_type] => utility [patent_app_number] => 17/679170 [patent_app_country] => US [patent_app_date] => 2022-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4350 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 25 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17679170 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/679170
Memory device and operation method thereof Feb 23, 2022 Issued
Array ( [id] => 18781981 [patent_doc_number] => 11823746 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-21 [patent_title] => Memory sector with trimmed reference currents and method of improving memory reading window thereof [patent_app_type] => utility [patent_app_number] => 17/673829 [patent_app_country] => US [patent_app_date] => 2022-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3224 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17673829 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/673829
Memory sector with trimmed reference currents and method of improving memory reading window thereof Feb 16, 2022 Issued
Array ( [id] => 18570239 [patent_doc_number] => 20230260576 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-17 [patent_title] => TECHNIQUES FOR PARALLEL MEMORY CELL ACCESS [patent_app_type] => utility [patent_app_number] => 17/651216 [patent_app_country] => US [patent_app_date] => 2022-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19624 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 278 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17651216 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/651216
Techniques for parallel memory cell access Feb 14, 2022 Issued
Array ( [id] => 18570232 [patent_doc_number] => 20230260569 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-17 [patent_title] => MEMORY DEVICE AND METHOD FOR COMPUTING-IN-MEMORY (CIM) [patent_app_type] => utility [patent_app_number] => 17/670384 [patent_app_country] => US [patent_app_date] => 2022-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10826 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17670384 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/670384
Memory device and method for computing-in-memory (CIM) Feb 10, 2022 Issued
Array ( [id] => 18080774 [patent_doc_number] => 20220406386 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-22 [patent_title] => SENSE AMPLIFIER CONTROL [patent_app_type] => utility [patent_app_number] => 17/585031 [patent_app_country] => US [patent_app_date] => 2022-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5230 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17585031 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/585031
Sense amplifier control Jan 25, 2022 Issued
Array ( [id] => 18639282 [patent_doc_number] => 11763898 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-19 [patent_title] => Value-voltage-distirubution-intersection-based read disturb information determination system [patent_app_type] => utility [patent_app_number] => 17/581879 [patent_app_country] => US [patent_app_date] => 2022-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 34 [patent_no_of_words] => 23359 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17581879 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/581879
Value-voltage-distirubution-intersection-based read disturb information determination system Jan 21, 2022 Issued
Array ( [id] => 18243541 [patent_doc_number] => 20230075852 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-09 [patent_title] => SEMICONDUCTOR STORAGE DEVICE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/579646 [patent_app_country] => US [patent_app_date] => 2022-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10315 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17579646 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/579646
SEMICONDUCTOR STORAGE DEVICE AND MANUFACTURING METHOD THEREOF Jan 19, 2022 Abandoned
Array ( [id] => 18097063 [patent_doc_number] => 20220415404 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-29 [patent_title] => NONVOLATILE MEMORY DEVICES HAVING ADAPTIVE WRITE/READ CONTROL TO IMPROVE READ RELIABILITY AND METHODS OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/579902 [patent_app_country] => US [patent_app_date] => 2022-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9470 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17579902 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/579902
Nonvolatile memory devices having adaptive write/read control to improve read reliability and methods of operating the same Jan 19, 2022 Issued
Array ( [id] => 17779861 [patent_doc_number] => 20220246211 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-04 [patent_title] => DEVICE COMPRISING A NON-VOLATILE MEMORY CIRCUIT [patent_app_type] => utility [patent_app_number] => 17/648449 [patent_app_country] => US [patent_app_date] => 2022-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4329 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17648449 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/648449
Buffer memory adapted to implment calculations having operands as data Jan 19, 2022 Issued
Array ( [id] => 18403717 [patent_doc_number] => 11665877 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-05-30 [patent_title] => Stacked FET SRAM design [patent_app_type] => utility [patent_app_number] => 17/564902 [patent_app_country] => US [patent_app_date] => 2021-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 6975 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 299 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17564902 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/564902
Stacked FET SRAM design Dec 28, 2021 Issued
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