Search

Thomas C. Lee

Supervisory Patent Examiner (ID: 864, Phone: (571)272-3667 , Office: P/2115 )

Most Active Art Unit
2302
Art Unit(s)
2317, 2182, 2302, 2185, 2782, 2115, 2307
Total Applications
703
Issued Applications
429
Pending Applications
30
Abandoned Applications
248

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 2772342 [patent_doc_number] => 04994960 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-02-19 [patent_title] => 'Interrupt system for transmitting interrupt request signal and interrupt vector based upon output of synchronized counters representing selected priority value' [patent_app_type] => 1 [patent_app_number] => 7/378422 [patent_app_country] => US [patent_app_date] => 1989-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2461 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 387 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/994/04994960.pdf [firstpage_image] =>[orig_patent_app_number] => 378422 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/378422
Interrupt system for transmitting interrupt request signal and interrupt vector based upon output of synchronized counters representing selected priority value Jul 9, 1989 Issued
Array ( [id] => 2597879 [patent_doc_number] => 04959774 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-09-25 [patent_title] => 'Shadow memory system for storing variable backup blocks in consecutive time periods' [patent_app_type] => 1 [patent_app_number] => 7/374614 [patent_app_country] => US [patent_app_date] => 1989-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5468 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 243 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/959/04959774.pdf [firstpage_image] =>[orig_patent_app_number] => 374614 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/374614
Shadow memory system for storing variable backup blocks in consecutive time periods Jun 29, 1989 Issued
07/361853 APPLIANCE INTERFACE FOR EXCHANGING DATA Jun 1, 1989 Abandoned
Array ( [id] => 2943369 [patent_doc_number] => 05189610 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-02-23 [patent_title] => 'Electronic dictionary with correct and incorrect words' [patent_app_type] => 1 [patent_app_number] => 7/355062 [patent_app_country] => US [patent_app_date] => 1989-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 6473 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/189/05189610.pdf [firstpage_image] =>[orig_patent_app_number] => 355062 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/355062
Electronic dictionary with correct and incorrect words May 16, 1989 Issued
Array ( [id] => 3023652 [patent_doc_number] => 05276814 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-01-04 [patent_title] => 'Method for transferring information between main store and input output bus units via a sequence of asynchronous bus and two synchronous buses' [patent_app_type] => 1 [patent_app_number] => 7/351181 [patent_app_country] => US [patent_app_date] => 1989-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 41 [patent_figures_cnt] => 49 [patent_no_of_words] => 31708 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 389 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/276/05276814.pdf [firstpage_image] =>[orig_patent_app_number] => 351181 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/351181
Method for transferring information between main store and input output bus units via a sequence of asynchronous bus and two synchronous buses May 9, 1989 Issued
Array ( [id] => 2721375 [patent_doc_number] => 05010482 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-04-23 [patent_title] => 'Multi-event mechanism for queuing happened events for a large data processing system' [patent_app_type] => 1 [patent_app_number] => 7/328812 [patent_app_country] => US [patent_app_date] => 1989-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 25 [patent_no_of_words] => 8804 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 254 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/010/05010482.pdf [firstpage_image] =>[orig_patent_app_number] => 328812 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/328812
Multi-event mechanism for queuing happened events for a large data processing system Mar 22, 1989 Issued
Array ( [id] => 2672497 [patent_doc_number] => 04947370 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-08-07 [patent_title] => 'Word processor for simultaneously displaying and scrolling documents and the corresponding titles' [patent_app_type] => 1 [patent_app_number] => 7/320874 [patent_app_country] => US [patent_app_date] => 1989-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 2526 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 214 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/947/04947370.pdf [firstpage_image] =>[orig_patent_app_number] => 320874 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/320874
Word processor for simultaneously displaying and scrolling documents and the corresponding titles Mar 9, 1989 Issued
Array ( [id] => 2678227 [patent_doc_number] => 04954982 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-09-04 [patent_title] => 'Method and circuit for checking storage protection by pre-checking an access request key' [patent_app_type] => 1 [patent_app_number] => 7/315213 [patent_app_country] => US [patent_app_date] => 1989-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2560 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 242 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/954/04954982.pdf [firstpage_image] =>[orig_patent_app_number] => 315213 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/315213
Method and circuit for checking storage protection by pre-checking an access request key Feb 23, 1989 Issued
Array ( [id] => 2756021 [patent_doc_number] => 05016164 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-05-14 [patent_title] => 'Computer system having delayed save on procedure calls' [patent_app_type] => 1 [patent_app_number] => 7/317061 [patent_app_country] => US [patent_app_date] => 1989-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 2684 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/016/05016164.pdf [firstpage_image] =>[orig_patent_app_number] => 317061 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/317061
Computer system having delayed save on procedure calls Feb 23, 1989 Issued
Array ( [id] => 2671424 [patent_doc_number] => 04947315 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-08-07 [patent_title] => 'System for controlling instrument using a levels data structure and concurrently running compiler task and operator task' [patent_app_type] => 1 [patent_app_number] => 7/314282 [patent_app_country] => US [patent_app_date] => 1989-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5234 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 248 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/947/04947315.pdf [firstpage_image] =>[orig_patent_app_number] => 314282 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/314282
System for controlling instrument using a levels data structure and concurrently running compiler task and operator task Feb 20, 1989 Issued
Array ( [id] => 2778393 [patent_doc_number] => 04985825 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-01-15 [patent_title] => 'System for delaying processing of memory access exceptions until the execution stage of an instruction pipeline of a virtual memory system based digital computer' [patent_app_type] => 1 [patent_app_number] => 7/306866 [patent_app_country] => US [patent_app_date] => 1989-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 13811 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 326 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/985/04985825.pdf [firstpage_image] =>[orig_patent_app_number] => 306866 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/306866
System for delaying processing of memory access exceptions until the execution stage of an instruction pipeline of a virtual memory system based digital computer Feb 2, 1989 Issued
Array ( [id] => 2715681 [patent_doc_number] => 05001624 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-03-19 [patent_title] => 'Processor controlled DMA controller for transferring instruction and data from memory to coprocessor' [patent_app_type] => 1 [patent_app_number] => 7/303024 [patent_app_country] => US [patent_app_date] => 1989-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 18 [patent_no_of_words] => 7198 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/001/05001624.pdf [firstpage_image] =>[orig_patent_app_number] => 303024 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/303024
Processor controlled DMA controller for transferring instruction and data from memory to coprocessor Jan 24, 1989 Issued
Array ( [id] => 2635269 [patent_doc_number] => 04951194 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-08-21 [patent_title] => 'Method for reducing memory allocations and data copying operations during program calling sequences' [patent_app_type] => 1 [patent_app_number] => 7/299581 [patent_app_country] => US [patent_app_date] => 1989-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 6142 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 392 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/951/04951194.pdf [firstpage_image] =>[orig_patent_app_number] => 299581 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/299581
Method for reducing memory allocations and data copying operations during program calling sequences Jan 22, 1989 Issued
Array ( [id] => 2715900 [patent_doc_number] => 05014192 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-05-07 [patent_title] => 'System for locating a file in a logical ring by sequentially forwarding access request with file system name and file name' [patent_app_type] => 1 [patent_app_number] => 7/300687 [patent_app_country] => US [patent_app_date] => 1989-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 9630 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 273 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/014/05014192.pdf [firstpage_image] =>[orig_patent_app_number] => 300687 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/300687
System for locating a file in a logical ring by sequentially forwarding access request with file system name and file name Jan 18, 1989 Issued
Array ( [id] => 2907709 [patent_doc_number] => 05241639 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-08-31 [patent_title] => 'Method for updating data from a cache address location to main memory and maintaining the cache address in registration memory' [patent_app_type] => 1 [patent_app_number] => 7/300403 [patent_app_country] => US [patent_app_date] => 1989-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 2615 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 238 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/241/05241639.pdf [firstpage_image] =>[orig_patent_app_number] => 300403 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/300403
Method for updating data from a cache address location to main memory and maintaining the cache address in registration memory Jan 18, 1989 Issued
07/296796 DIGITAL COMPUTER SYSTEM HAVING CIRCUITRY FOR ADAPTING ITS CLOCK FREQUENCY TO THAT OF AN ASSOCIATED BUS Jan 11, 1989 Abandoned
Array ( [id] => 2772560 [patent_doc_number] => 05063499 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-11-05 [patent_title] => 'Method for a correlating virtual memory systems by redirecting access for used stock instead of supervisor stock during normal supervisor mode processing' [patent_app_type] => 1 [patent_app_number] => 7/294831 [patent_app_country] => US [patent_app_date] => 1989-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 15 [patent_no_of_words] => 10734 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 266 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/063/05063499.pdf [firstpage_image] =>[orig_patent_app_number] => 294831 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/294831
Method for a correlating virtual memory systems by redirecting access for used stock instead of supervisor stock during normal supervisor mode processing Jan 8, 1989 Issued
07/292319 SYSTEM FOR COMMUNICATION BETWEEN STATIONS HAVING DIFFERENT DATA FORMAT CAPABILITIES Dec 29, 1988 Abandoned
07/292626 COMPUTER SYSTEM MEMORY PERFORMANCE IMPROVEMENT APPARATUS Dec 28, 1988 Abandoned
Array ( [id] => 3421215 [patent_doc_number] => 05412587 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-05-02 [patent_title] => 'Pseudorandom stochastic data processing' [patent_app_type] => 1 [patent_app_number] => 7/291655 [patent_app_country] => US [patent_app_date] => 1988-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 12 [patent_no_of_words] => 3850 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/412/05412587.pdf [firstpage_image] =>[orig_patent_app_number] => 291655 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/291655
Pseudorandom stochastic data processing Dec 27, 1988 Issued
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