Thomas C. Lee

Array ( [id] => 2485355 [patent_doc_number] => 04812981 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-03-14 [patent_title] => 'Memory management system improving the efficiency of fork operations' [patent_app_type] => 1 [patent_app_number] => 6/790839 [patent_app_country] => US [patent_app_date] => 1985-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2933 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/812/04812981.pdf [firstpage_image] =>[orig_patent_app_number] => 790839 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2225205 [patent_doc_number] => 04594658 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-06-10 [patent_title] => 'Hierarchy of control stores for overlapped data transmission' [patent_app_type] => 1 [patent_app_number] => 6/789353 [patent_app_country] => US [patent_app_date] => 1985-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 4864 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/594/04594658.pdf [firstpage_image] =>[orig_patent_app_number] => 789353 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2389533 [patent_doc_number] => 04720780 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-01-19 [patent_title] => 'Memory-linked wavefront array processor' [patent_app_type] => 1 [patent_app_number] => 6/777112 [patent_app_country] => US [patent_app_date] => 1985-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 20 [patent_no_of_words] => 8872 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/720/04720780.pdf [firstpage_image] =>[orig_patent_app_number] => 777112 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2400657 [patent_doc_number] => 04782463 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-11-01 [patent_title] => 'Method for generating display screens for a set of application programs by calling screen management subroutines' [patent_app_type] => 1 [patent_app_number] => 6/775545 [patent_app_country] => US [patent_app_date] => 1985-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 48 [patent_no_of_words] => 10199 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/782/04782463.pdf [firstpage_image] =>[orig_patent_app_number] => 775545 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2644582 [patent_doc_number] => 04899306 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-02-06 [patent_title] => 'Test interface circuit which generates different interface control signals for different target computers responding to control signals from host computer' [patent_app_type] => 1 [patent_app_number] => 6/769138 [patent_app_country] => US [patent_app_date] => 1985-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 5688 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/899/04899306.pdf [firstpage_image] =>[orig_patent_app_number] => 769138 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2640995 [patent_doc_number] => 04937738 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-06-26 [patent_title] => 'Data processing system which selectively bypasses a cache memory in fetching information based upon bit information of an instruction' [patent_app_type] => 1 [patent_app_number] => 6/768572 [patent_app_country] => US [patent_app_date] => 1985-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3812 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 256 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/937/04937738.pdf [firstpage_image] =>[orig_patent_app_number] => 768572 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2349870 [patent_doc_number] => 04641274 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-02-03 [patent_title] => 'Method for communicating changes made to text form a text processor to a remote host' [patent_app_type] => 1 [patent_app_number] => 6/766722 [patent_app_country] => US [patent_app_date] => 1985-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 10271 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 239 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/641/04641274.pdf [firstpage_image] =>[orig_patent_app_number] => 766722 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2560947 [patent_doc_number] => 04833605 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-05-23 [patent_title] => 'Cascaded information processing module having operation unit, parallel port, and serial port for concurrent data transfer and data processing' [patent_app_type] => 1 [patent_app_number] => 6/765970 [patent_app_country] => US [patent_app_date] => 1985-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 28 [patent_no_of_words] => 10116 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/833/04833605.pdf [firstpage_image] =>[orig_patent_app_number] => 765970 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2645553 [patent_doc_number] => 04910655 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-03-20 [patent_title] => 'Apparatus for transferring signals and data under the control of a host computer' [patent_app_type] => 1 [patent_app_number] => 6/765396 [patent_app_country] => US [patent_app_date] => 1985-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 4795 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 906 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/910/04910655.pdf [firstpage_image] =>[orig_patent_app_number] => 765396 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2564159 [patent_doc_number] => 04814979 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-03-21 [patent_title] => 'Network to transmit prioritized subtask pockets to dedicated processors' [patent_app_type] => 1 [patent_app_number] => 6/755436 [patent_app_country] => US [patent_app_date] => 1985-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 36 [patent_no_of_words] => 28377 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/814/04814979.pdf [firstpage_image] =>[orig_patent_app_number] => 755436 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2358925 [patent_doc_number] => 04654819 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-03-31 [patent_title] => 'Memory back-up system' [patent_app_type] => 1 [patent_app_number] => 6/750652 [patent_app_country] => US [patent_app_date] => 1985-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 9 [patent_no_of_words] => 22309 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 456 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/654/04654819.pdf [firstpage_image] =>[orig_patent_app_number] => 750652 [rel_patent_id] =>[rel_patent_doc_number] =>)