Search

Thomas C. Lee

Supervisory Patent Examiner (ID: 16006, Phone: (571)272-3667 , Office: P/2115 )

Most Active Art Unit
2302
Art Unit(s)
2302, 2307, 2782, 2182, 2185, 2115, 2317
Total Applications
694
Issued Applications
429
Pending Applications
17
Abandoned Applications
248

Applications

Application numberTitle of the applicationFiling DateStatus
06/787235 SHARING WORD-PROCESSING FUNCTIONS AMONG MULTIPLE PROCESSORS Oct 14, 1985 Abandoned
06/784176 SERIAL CHIP SCAN Oct 3, 1985 Abandoned
06/781320 INFORMATION PROCESSING SYSTEM INCLUDING A WORD PROCESSOR CAPABLE OF COMMUNICATING WITH FACSIMILE APPARATUS Sep 29, 1985 Abandoned
06/781231 MULTIPLE PORT PIPELINED PROCESSOR Sep 26, 1985 Abandoned
06/777216 SOFTWARE ANALYSIS SYSTEM Sep 17, 1985 Abandoned
Array ( [id] => 2389533 [patent_doc_number] => 04720780 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-01-19 [patent_title] => 'Memory-linked wavefront array processor' [patent_app_type] => 1 [patent_app_number] => 6/777112 [patent_app_country] => US [patent_app_date] => 1985-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 20 [patent_no_of_words] => 8872 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/720/04720780.pdf [firstpage_image] =>[orig_patent_app_number] => 777112 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/777112
Memory-linked wavefront array processor Sep 16, 1985 Issued
Array ( [id] => 2400657 [patent_doc_number] => 04782463 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-11-01 [patent_title] => 'Method for generating display screens for a set of application programs by calling screen management subroutines' [patent_app_type] => 1 [patent_app_number] => 6/775545 [patent_app_country] => US [patent_app_date] => 1985-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 48 [patent_no_of_words] => 10199 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/782/04782463.pdf [firstpage_image] =>[orig_patent_app_number] => 775545 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/775545
Method for generating display screens for a set of application programs by calling screen management subroutines Sep 11, 1985 Issued
Array ( [id] => 2644582 [patent_doc_number] => 04899306 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-02-06 [patent_title] => 'Test interface circuit which generates different interface control signals for different target computers responding to control signals from host computer' [patent_app_type] => 1 [patent_app_number] => 6/769138 [patent_app_country] => US [patent_app_date] => 1985-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 5688 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/899/04899306.pdf [firstpage_image] =>[orig_patent_app_number] => 769138 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/769138
Test interface circuit which generates different interface control signals for different target computers responding to control signals from host computer Aug 25, 1985 Issued
Array ( [id] => 2640995 [patent_doc_number] => 04937738 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-06-26 [patent_title] => 'Data processing system which selectively bypasses a cache memory in fetching information based upon bit information of an instruction' [patent_app_type] => 1 [patent_app_number] => 6/768572 [patent_app_country] => US [patent_app_date] => 1985-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3812 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 256 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/937/04937738.pdf [firstpage_image] =>[orig_patent_app_number] => 768572 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/768572
Data processing system which selectively bypasses a cache memory in fetching information based upon bit information of an instruction Aug 22, 1985 Issued
Array ( [id] => 2349870 [patent_doc_number] => 04641274 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-02-03 [patent_title] => 'Method for communicating changes made to text form a text processor to a remote host' [patent_app_type] => 1 [patent_app_number] => 6/766722 [patent_app_country] => US [patent_app_date] => 1985-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 10271 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 239 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/641/04641274.pdf [firstpage_image] =>[orig_patent_app_number] => 766722 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/766722
Method for communicating changes made to text form a text processor to a remote host Aug 18, 1985 Issued
06/766196 RESOURCE MANAGEMENT SYSTEM AND METRHOD IN A DISTRIBUTED PROCESSING SYSTEM Aug 15, 1985 Abandoned
Array ( [id] => 2560947 [patent_doc_number] => 04833605 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-05-23 [patent_title] => 'Cascaded information processing module having operation unit, parallel port, and serial port for concurrent data transfer and data processing' [patent_app_type] => 1 [patent_app_number] => 6/765970 [patent_app_country] => US [patent_app_date] => 1985-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 28 [patent_no_of_words] => 10116 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/833/04833605.pdf [firstpage_image] =>[orig_patent_app_number] => 765970 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/765970
Cascaded information processing module having operation unit, parallel port, and serial port for concurrent data transfer and data processing Aug 14, 1985 Issued
Array ( [id] => 2645553 [patent_doc_number] => 04910655 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-03-20 [patent_title] => 'Apparatus for transferring signals and data under the control of a host computer' [patent_app_type] => 1 [patent_app_number] => 6/765396 [patent_app_country] => US [patent_app_date] => 1985-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 4795 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 906 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/910/04910655.pdf [firstpage_image] =>[orig_patent_app_number] => 765396 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/765396
Apparatus for transferring signals and data under the control of a host computer Aug 13, 1985 Issued
Array ( [id] => 2564159 [patent_doc_number] => 04814979 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-03-21 [patent_title] => 'Network to transmit prioritized subtask pockets to dedicated processors' [patent_app_type] => 1 [patent_app_number] => 6/755436 [patent_app_country] => US [patent_app_date] => 1985-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 36 [patent_no_of_words] => 28377 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/814/04814979.pdf [firstpage_image] =>[orig_patent_app_number] => 755436 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/755436
Network to transmit prioritized subtask pockets to dedicated processors Jul 15, 1985 Issued
Array ( [id] => 2358925 [patent_doc_number] => 04654819 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-03-31 [patent_title] => 'Memory back-up system' [patent_app_type] => 1 [patent_app_number] => 6/750652 [patent_app_country] => US [patent_app_date] => 1985-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 9 [patent_no_of_words] => 22309 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 456 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/654/04654819.pdf [firstpage_image] =>[orig_patent_app_number] => 750652 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/750652
Memory back-up system Jun 27, 1985 Issued
Array ( [id] => 2556552 [patent_doc_number] => 04811205 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-03-07 [patent_title] => 'Pipeline display control apparatus with logic for blocking graphics processor accesses to shared memory during selected main processor graphics operations' [patent_app_type] => 1 [patent_app_number] => 6/748089 [patent_app_country] => US [patent_app_date] => 1985-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3524 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 241 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/811/04811205.pdf [firstpage_image] =>[orig_patent_app_number] => 748089 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/748089
Pipeline display control apparatus with logic for blocking graphics processor accesses to shared memory during selected main processor graphics operations Jun 23, 1985 Issued
Array ( [id] => 2246473 [patent_doc_number] => 04608690 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-08-26 [patent_title] => 'Detecting improper operation of a digital data processing apparatus' [patent_app_type] => 1 [patent_app_number] => 6/743266 [patent_app_country] => US [patent_app_date] => 1985-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2682 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/608/04608690.pdf [firstpage_image] =>[orig_patent_app_number] => 743266 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/743266
Detecting improper operation of a digital data processing apparatus Jun 9, 1985 Issued
Array ( [id] => 2452421 [patent_doc_number] => 04751674 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-06-14 [patent_title] => 'Apparatus for numbering outline data and for selecting outline format data which corresponds to the outline position of a cursor' [patent_app_type] => 1 [patent_app_number] => 6/739883 [patent_app_country] => US [patent_app_date] => 1985-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 5270 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/751/04751674.pdf [firstpage_image] =>[orig_patent_app_number] => 739883 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/739883
Apparatus for numbering outline data and for selecting outline format data which corresponds to the outline position of a cursor May 30, 1985 Issued
06/739368 PROCEDURE FOR CONTROLLING THE ORDER OF EDITING CELLS IN A SPREADSHEET May 29, 1985 Abandoned
Array ( [id] => 2430214 [patent_doc_number] => 04780810 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-10-25 [patent_title] => 'Data processor with associative memory storing vector elements for vector conversion' [patent_app_type] => 1 [patent_app_number] => 6/737453 [patent_app_country] => US [patent_app_date] => 1985-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4555 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 345 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/780/04780810.pdf [firstpage_image] =>[orig_patent_app_number] => 737453 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/737453
Data processor with associative memory storing vector elements for vector conversion May 23, 1985 Issued
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