Thomas C. Lee

Array ( [id] => 2360722 [patent_doc_number] => 04651298 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-03-17 [patent_title] => 'Selection of data from busses for test' [patent_app_type] => 1 [patent_app_number] => 6/615503 [patent_app_country] => US [patent_app_date] => 1984-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 16 [patent_no_of_words] => 10893 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 409 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/651/04651298.pdf [firstpage_image] =>[orig_patent_app_number] => 615503 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2326814 [patent_doc_number] => 04636656 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-01-13 [patent_title] => 'Circuit for selectively extending a cycle of a clock signal' [patent_app_type] => 1 [patent_app_number] => 6/612212 [patent_app_country] => US [patent_app_date] => 1984-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1844 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 274 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/636/04636656.pdf [firstpage_image] =>[orig_patent_app_number] => 612212 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2301136 [patent_doc_number] => 04653048 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-03-24 [patent_title] => 'Method for interprocessor message accountability' [patent_app_type] => 1 [patent_app_number] => 6/609826 [patent_app_country] => US [patent_app_date] => 1984-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 4657 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/653/04653048.pdf [firstpage_image] =>[orig_patent_app_number] => 609826 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2294327 [patent_doc_number] => 04679139 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-07-07 [patent_title] => 'Method and system for determination of data record order based on keyfield values' [patent_app_type] => 1 [patent_app_number] => 6/605788 [patent_app_country] => US [patent_app_date] => 1984-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 9300 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 22 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/679/04679139.pdf [firstpage_image] =>[orig_patent_app_number] => 605788 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2330710 [patent_doc_number] => 04680701 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-07-14 [patent_title] => 'Asynchronous high speed processor having high speed memories with domino circuits contained therein' [patent_app_type] => 1 [patent_app_number] => 6/598946 [patent_app_country] => US [patent_app_date] => 1984-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 19952 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 240 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/680/04680701.pdf [firstpage_image] =>[orig_patent_app_number] => 598946 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2301663 [patent_doc_number] => 04697233 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-09-29 [patent_title] => 'Partial duplication of pipelined stack with data integrity checking' [patent_app_type] => 1 [patent_app_number] => 6/595864 [patent_app_country] => US [patent_app_date] => 1984-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 25 [patent_no_of_words] => 13521 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 250 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/697/04697233.pdf [firstpage_image] =>[orig_patent_app_number] => 595864 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2307621 [patent_doc_number] => 04674032 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-06-16 [patent_title] => 'High-performance pipelined stack with over-write protection' [patent_app_type] => 1 [patent_app_number] => 6/596203 [patent_app_country] => US [patent_app_date] => 1984-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 23 [patent_no_of_words] => 14804 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 477 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/674/04674032.pdf [firstpage_image] =>[orig_patent_app_number] => 596203 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2355066 [patent_doc_number] => 04692860 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-09-08 [patent_title] => 'Apparatus for load regulation in computer systems' [patent_app_type] => 1 [patent_app_number] => 6/588796 [patent_app_country] => US [patent_app_date] => 1984-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 4214 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 551 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/692/04692860.pdf [firstpage_image] =>[orig_patent_app_number] => 588796 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2364972 [patent_doc_number] => 04648102 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-03-03 [patent_title] => 'Bus interface device for a data processing system' [patent_app_type] => 1 [patent_app_number] => 6/586475 [patent_app_country] => US [patent_app_date] => 1984-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3243 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 279 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/648/04648102.pdf [firstpage_image] =>[orig_patent_app_number] => 586475 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2349670 [patent_doc_number] => 04641262 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-02-03 [patent_title] => 'Personal computer attachment for host system display station' [patent_app_type] => 1 [patent_app_number] => 6/585813 [patent_app_country] => US [patent_app_date] => 1984-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 22 [patent_no_of_words] => 14038 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/641/04641262.pdf [firstpage_image] =>[orig_patent_app_number] => 585813 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2225202 [patent_doc_number] => 04631702 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-12-23 [patent_title] => 'Computer speed control' [patent_app_type] => 1 [patent_app_number] => 6/584497 [patent_app_country] => US [patent_app_date] => 1984-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2312 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 307 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/631/04631702.pdf [firstpage_image] =>[orig_patent_app_number] => 584497 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2286674 [patent_doc_number] => 04623986 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-11-18 [patent_title] => 'Memory access controller having cycle number register for storing the number of column address cycles in a multiple column address/single row address memory access cycle' [patent_app_type] => 1 [patent_app_number] => 6/583071 [patent_app_country] => US [patent_app_date] => 1984-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 4789 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 393 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/623/04623986.pdf [firstpage_image] =>[orig_patent_app_number] => 583071 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2397799 [patent_doc_number] => 04663732 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-05-05 [patent_title] => 'Apparatus for storing and retrieving data in predetermined multi-bit quantities containing fewer bits of data than word length quantities' [patent_app_type] => 1 [patent_app_number] => 6/582589 [patent_app_country] => US [patent_app_date] => 1984-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4098 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 429 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/663/04663732.pdf [firstpage_image] =>[orig_patent_app_number] => 582589 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2223028 [patent_doc_number] => 04621321 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-11-04 [patent_title] => 'Secure data processing system architecture' [patent_app_type] => 1 [patent_app_number] => 6/580910 [patent_app_country] => US [patent_app_date] => 1984-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 7185 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/621/04621321.pdf [firstpage_image] =>[orig_patent_app_number] => 580910 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2397781 [patent_doc_number] => 04663731 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-05-05 [patent_title] => 'Word processing system for inserting characters into a series of characters' [patent_app_type] => 1 [patent_app_number] => 6/574252 [patent_app_country] => US [patent_app_date] => 1984-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 19 [patent_no_of_words] => 4718 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 270 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/663/04663731.pdf [firstpage_image] =>[orig_patent_app_number] => 574252 [rel_patent_id] =>[rel_patent_doc_number] =>)