| Application number | Title of the application | Filing Date | Status |
|---|
Array
(
[id] => 7689954
[patent_doc_number] => 20070234079
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-10-04
[patent_title] => 'INFORMATION PROCESSING DEVICE, POWER SUPPLY CONTROL METHOD AND STORAGE MEDIUM'
[patent_app_type] => utility
[patent_app_number] => 11/460718
[patent_app_country] => US
[patent_app_date] => 2006-07-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 3507
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0234/20070234079.pdf
[firstpage_image] =>[orig_patent_app_number] => 11460718
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/460718 | INFORMATION PROCESSING DEVICE, POWER SUPPLY CONTROL METHOD AND STORAGE MEDIUM | Jul 27, 2006 | Abandoned |
Array
(
[id] => 5108774
[patent_doc_number] => 20070067652
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-03-22
[patent_title] => 'System using bus arbiter to power down'
[patent_app_type] => utility
[patent_app_number] => 11/474445
[patent_app_country] => US
[patent_app_date] => 2006-06-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 5290
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0067/20070067652.pdf
[firstpage_image] =>[orig_patent_app_number] => 11474445
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/474445 | System using bus arbiter to power down | Jun 25, 2006 | Abandoned |
Array
(
[id] => 5907066
[patent_doc_number] => 20060047983
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-03-02
[patent_title] => 'Multiple source/multiple device connector'
[patent_app_type] => utility
[patent_app_number] => 11/132203
[patent_app_country] => US
[patent_app_date] => 2005-05-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 5212
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0047/20060047983.pdf
[firstpage_image] =>[orig_patent_app_number] => 11132203
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/132203 | Multiple source/multiple device connector | May 18, 2005 | Abandoned |
Array
(
[id] => 5903782
[patent_doc_number] => 20060046582
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-03-02
[patent_title] => 'Aircraft seat electrical quick disconnect'
[patent_app_type] => utility
[patent_app_number] => 10/925627
[patent_app_country] => US
[patent_app_date] => 2004-08-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 4724
[patent_no_of_claims] => 28
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0046/20060046582.pdf
[firstpage_image] =>[orig_patent_app_number] => 10925627
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/925627 | Aircraft seat electrical quick disconnect | Aug 24, 2004 | Issued |
Array
(
[id] => 6920023
[patent_doc_number] => 20050097378
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-05-05
[patent_title] => 'Method and system for power management in a gigabit Ethernet chip'
[patent_app_type] => utility
[patent_app_number] => 10/887061
[patent_app_country] => US
[patent_app_date] => 2004-07-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 12650
[patent_no_of_claims] => 31
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0097/20050097378.pdf
[firstpage_image] =>[orig_patent_app_number] => 10887061
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/887061 | Method and system for power management in a gigabit Ethernet chip | Jul 7, 2004 | Abandoned |
Array
(
[id] => 7234852
[patent_doc_number] => 20050071939
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-04-07
[patent_title] => 'Dual head toothbrush'
[patent_app_type] => utility
[patent_app_number] => 10/679428
[patent_app_country] => US
[patent_app_date] => 2003-10-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 1885
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0071/20050071939.pdf
[firstpage_image] =>[orig_patent_app_number] => 10679428
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/679428 | Dual head toothbrush | Oct 6, 2003 | Abandoned |
Array
(
[id] => 1031800
[patent_doc_number] => 06879147
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-04-12
[patent_title] => 'Package with environmental control material carrier'
[patent_app_type] => utility
[patent_app_number] => 10/674829
[patent_app_country] => US
[patent_app_date] => 2003-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 10
[patent_no_of_words] => 2383
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 69
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/879/06879147.pdf
[firstpage_image] =>[orig_patent_app_number] => 10674829
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/674829 | Package with environmental control material carrier | Sep 29, 2003 | Issued |
Array
(
[id] => 732908
[patent_doc_number] => 07032719
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-04-25
[patent_title] => 'Bicycle hub with an outside-accessible brake force adjusting mechanism'
[patent_app_type] => utility
[patent_app_number] => 10/604814
[patent_app_country] => US
[patent_app_date] => 2003-08-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2897
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 141
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/032/07032719.pdf
[firstpage_image] =>[orig_patent_app_number] => 10604814
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/604814 | Bicycle hub with an outside-accessible brake force adjusting mechanism | Aug 18, 2003 | Issued |
| 10/246368 | DSL line card echo canceler-based mechanism for locating telecommunication line fault | Sep 17, 2002 | Abandoned |
Array
(
[id] => 7387201
[patent_doc_number] => 20040021330
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-02-05
[patent_title] => 'Fingertip grippers'
[patent_app_type] => new
[patent_app_number] => 10/074424
[patent_app_country] => US
[patent_app_date] => 2002-08-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 753
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 15
[patent_words_short_claim] => 4
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0021/20040021330.pdf
[firstpage_image] =>[orig_patent_app_number] => 10074424
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/074424 | Fingertip grippers | Aug 4, 2002 | Abandoned |
Array
(
[id] => 7435696
[patent_doc_number] => 20040230701
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-11-18
[patent_title] => 'Information processing device'
[patent_app_type] => new
[patent_app_number] => 10/152315
[patent_app_country] => US
[patent_app_date] => 2002-05-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2467
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 69
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0230/20040230701.pdf
[firstpage_image] =>[orig_patent_app_number] => 10152315
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/152315 | Method of efficiently detecting whether a device is connected to an information processing system by detecting short circuits to predetermined signal lines of an IDE interface | May 21, 2002 | Issued |
Array
(
[id] => 6871663
[patent_doc_number] => 20030084353
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-05-01
[patent_title] => 'System and method for predictive power ramping'
[patent_app_type] => new
[patent_app_number] => 09/984938
[patent_app_country] => US
[patent_app_date] => 2001-10-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3681
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 63
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0084/20030084353.pdf
[firstpage_image] =>[orig_patent_app_number] => 09984938
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/984938 | System and method for predictive power ramping | Oct 30, 2001 | Abandoned |
Array
(
[id] => 1134178
[patent_doc_number] => 06792527
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-09-14
[patent_title] => 'Method to provide hierarchical reset capabilities for a configurable system on a chip'
[patent_app_type] => B1
[patent_app_number] => 09/746764
[patent_app_country] => US
[patent_app_date] => 2000-12-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2625
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 92
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/792/06792527.pdf
[firstpage_image] =>[orig_patent_app_number] => 09746764
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/746764 | Method to provide hierarchical reset capabilities for a configurable system on a chip | Dec 21, 2000 | Issued |
Array
(
[id] => 6632786
[patent_doc_number] => 20020066045
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-05-30
[patent_title] => 'Redundant power indicator feature'
[patent_app_type] => new
[patent_app_number] => 09/726778
[patent_app_country] => US
[patent_app_date] => 2000-11-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2276
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 71
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0066/20020066045.pdf
[firstpage_image] =>[orig_patent_app_number] => 09726778
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/726778 | System for determining servers power supply requirement by sampling power usage values thereof at a rate based upon the criticality of its availability | Nov 28, 2000 | Issued |
Array
(
[id] => 561955
[patent_doc_number] => 07165134
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2007-01-16
[patent_title] => 'System for selectively generating real-time interrupts and selectively processing associated data when it has higher priority than currently executing non-real-time operation'
[patent_app_type] => utility
[patent_app_number] => 09/606839
[patent_app_country] => US
[patent_app_date] => 2000-06-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 1874
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 111
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/165/07165134.pdf
[firstpage_image] =>[orig_patent_app_number] => 09606839
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/606839 | System for selectively generating real-time interrupts and selectively processing associated data when it has higher priority than currently executing non-real-time operation | Jun 27, 2000 | Issued |
Array
(
[id] => 4100979
[patent_doc_number] => 06163825
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-12-19
[patent_title] => 'Method for hot adding a network adapter by identifying and executing the adapter driver based upon the logical board number of the network adapter'
[patent_app_type] => 1
[patent_app_number] => 9/275906
[patent_app_country] => US
[patent_app_date] => 1999-03-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 21
[patent_no_of_words] => 11151
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 82
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/163/06163825.pdf
[firstpage_image] =>[orig_patent_app_number] => 275906
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/275906 | Method for hot adding a network adapter by identifying and executing the adapter driver based upon the logical board number of the network adapter | Mar 23, 1999 | Issued |
Array
(
[id] => 1549699
[patent_doc_number] => 06374360
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-04-16
[patent_title] => 'Method and apparatus for bit-to-bit timing correction of a high speed memory bus'
[patent_app_type] => B1
[patent_app_number] => 09/209587
[patent_app_country] => US
[patent_app_date] => 1998-12-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 14048
[patent_no_of_claims] => 79
[patent_no_of_ind_claims] => 17
[patent_words_short_claim] => 36
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/374/06374360.pdf
[firstpage_image] =>[orig_patent_app_number] => 09209587
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/209587 | Method and apparatus for bit-to-bit timing correction of a high speed memory bus | Dec 10, 1998 | Issued |
Array
(
[id] => 4317478
[patent_doc_number] => 06182169
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-01-30
[patent_title] => 'Tether fastened to personal digital assistant by latch having spring biased manual toggle'
[patent_app_type] => 1
[patent_app_number] => 9/187152
[patent_app_country] => US
[patent_app_date] => 1998-11-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 19
[patent_no_of_words] => 3747
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 314
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/182/06182169.pdf
[firstpage_image] =>[orig_patent_app_number] => 187152
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/187152 | Tether fastened to personal digital assistant by latch having spring biased manual toggle | Nov 5, 1998 | Issued |
Array
(
[id] => 4426905
[patent_doc_number] => 06195730
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-02-27
[patent_title] => 'Computer system with storage device mapping input/output processor'
[patent_app_type] => 1
[patent_app_number] => 9/122008
[patent_app_country] => US
[patent_app_date] => 1998-07-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 5013
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 174
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/195/06195730.pdf
[firstpage_image] =>[orig_patent_app_number] => 122008
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/122008 | Computer system with storage device mapping input/output processor | Jul 23, 1998 | Issued |
Array
(
[id] => 4374219
[patent_doc_number] => 06202164
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-03-13
[patent_title] => 'Data rate synchronization by frame rate adjustment'
[patent_app_type] => 1
[patent_app_number] => 9/109822
[patent_app_country] => US
[patent_app_date] => 1998-07-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 5257
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 194
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/202/06202164.pdf
[firstpage_image] =>[orig_patent_app_number] => 109822
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/109822 | Data rate synchronization by frame rate adjustment | Jul 1, 1998 | Issued |