
Thomas E. Lazo
Examiner (ID: 9271, Phone: (571)272-4818 , Office: P/3745 )
| Most Active Art Unit | 3745 |
| Art Unit(s) | 3745 |
| Total Applications | 3023 |
| Issued Applications | 2619 |
| Pending Applications | 135 |
| Abandoned Applications | 297 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 1427822
[patent_doc_number] => 06504175
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-01-07
[patent_title] => 'Hybrid polycrystalline and amorphous silicon structures on a shared substrate'
[patent_app_type] => B1
[patent_app_number] => 09/067943
[patent_app_country] => US
[patent_app_date] => 1998-04-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 12
[patent_no_of_words] => 4973
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 206
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/504/06504175.pdf
[firstpage_image] =>[orig_patent_app_number] => 09067943
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/067943 | Hybrid polycrystalline and amorphous silicon structures on a shared substrate | Apr 27, 1998 | Issued |
Array
(
[id] => 4423645
[patent_doc_number] => 06177710
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-01-23
[patent_title] => 'Semiconductor waveguide type photodetector and method for manufacturing the same'
[patent_app_type] => 1
[patent_app_number] => 9/011620
[patent_app_country] => US
[patent_app_date] => 1998-04-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 10
[patent_no_of_words] => 8419
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 169
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/177/06177710.pdf
[firstpage_image] =>[orig_patent_app_number] => 011620
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/011620 | Semiconductor waveguide type photodetector and method for manufacturing the same | Apr 26, 1998 | Issued |
Array
(
[id] => 4389746
[patent_doc_number] => 06262453
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-07-17
[patent_title] => 'Double gate-oxide for reducing gate-drain capacitance in trenched DMOS with high-dopant concentration buried-region under trenched gate'
[patent_app_type] => 1
[patent_app_number] => 9/066033
[patent_app_country] => US
[patent_app_date] => 1998-04-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 18
[patent_no_of_words] => 5181
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 47
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/262/06262453.pdf
[firstpage_image] =>[orig_patent_app_number] => 066033
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/066033 | Double gate-oxide for reducing gate-drain capacitance in trenched DMOS with high-dopant concentration buried-region under trenched gate | Apr 23, 1998 | Issued |
Array
(
[id] => 4105094
[patent_doc_number] => 06066876
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-05-23
[patent_title] => 'Integrated circuit arrangement having at least one MOS transistor manufactured by use of a planar transistor layout'
[patent_app_type] => 1
[patent_app_number] => 9/065173
[patent_app_country] => US
[patent_app_date] => 1998-04-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 7
[patent_no_of_words] => 3366
[patent_no_of_claims] => 3
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[patent_words_short_claim] => 102
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/066/06066876.pdf
[firstpage_image] =>[orig_patent_app_number] => 065173
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/065173 | Integrated circuit arrangement having at least one MOS transistor manufactured by use of a planar transistor layout | Apr 22, 1998 | Issued |
Array
(
[id] => 4111321
[patent_doc_number] => 06023083
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-02-08
[patent_title] => 'Semiconductor device having a conductor pattern side face provided with a separate conductive sidewall'
[patent_app_type] => 1
[patent_app_number] => 9/061060
[patent_app_country] => US
[patent_app_date] => 1998-04-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 19
[patent_no_of_words] => 6342
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/023/06023083.pdf
[firstpage_image] =>[orig_patent_app_number] => 061060
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/061060 | Semiconductor device having a conductor pattern side face provided with a separate conductive sidewall | Apr 15, 1998 | Issued |
Array
(
[id] => 4297562
[patent_doc_number] => 06236098
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-05-22
[patent_title] => 'Heat spreader'
[patent_app_type] => 1
[patent_app_number] => 9/061452
[patent_app_country] => US
[patent_app_date] => 1998-04-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 9
[patent_no_of_words] => 7568
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/236/06236098.pdf
[firstpage_image] =>[orig_patent_app_number] => 061452
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/061452 | Heat spreader | Apr 15, 1998 | Issued |
Array
(
[id] => 6985553
[patent_doc_number] => 20010035544
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2001-11-01
[patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME'
[patent_app_type] => new
[patent_app_number] => 09/050113
[patent_app_country] => US
[patent_app_date] => 1998-03-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 52
[patent_figures_cnt] => 52
[patent_no_of_words] => 24215
[patent_no_of_claims] => 34
[patent_no_of_ind_claims] => 11
[patent_words_short_claim] => 106
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0035/20010035544.pdf
[firstpage_image] =>[orig_patent_app_number] => 09050113
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/050113 | Semiconductor device including contact holes between adjacent conductor patterns and method for fabricating the same | Mar 29, 1998 | Issued |
Array
(
[id] => 4137486
[patent_doc_number] => 06147377
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-11-14
[patent_title] => 'Fully recessed semiconductor device'
[patent_app_type] => 1
[patent_app_number] => 9/052061
[patent_app_country] => US
[patent_app_date] => 1998-03-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 18
[patent_no_of_words] => 5041
[patent_no_of_claims] => 14
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[patent_words_short_claim] => 189
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[pdf_file] => patents/06/147/06147377.pdf
[firstpage_image] =>[orig_patent_app_number] => 052061
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/052061 | Fully recessed semiconductor device | Mar 29, 1998 | Issued |
Array
(
[id] => 4137500
[patent_doc_number] => 06147378
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-11-14
[patent_title] => 'Fully recessed semiconductor device and method for low power applications with single wrap around buried drain region'
[patent_app_type] => 1
[patent_app_number] => 9/052060
[patent_app_country] => US
[patent_app_date] => 1998-03-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[patent_no_of_words] => 5633
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[pdf_file] => patents/06/147/06147378.pdf
[firstpage_image] =>[orig_patent_app_number] => 052060
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/052060 | Fully recessed semiconductor device and method for low power applications with single wrap around buried drain region | Mar 29, 1998 | Issued |
Array
(
[id] => 4309503
[patent_doc_number] => 06188104
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-02-13
[patent_title] => 'Trench DMOS device having an amorphous silicon and polysilicon gate'
[patent_app_type] => 1
[patent_app_number] => 9/049601
[patent_app_country] => US
[patent_app_date] => 1998-03-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 14
[patent_no_of_words] => 2971
[patent_no_of_claims] => 14
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/188/06188104.pdf
[firstpage_image] =>[orig_patent_app_number] => 049601
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/049601 | Trench DMOS device having an amorphous silicon and polysilicon gate | Mar 26, 1998 | Issued |
Array
(
[id] => 4293870
[patent_doc_number] => 06211537
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-04-03
[patent_title] => 'LED array'
[patent_app_type] => 1
[patent_app_number] => 9/040450
[patent_app_country] => US
[patent_app_date] => 1998-03-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 17
[patent_no_of_words] => 4545
[patent_no_of_claims] => 14
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/211/06211537.pdf
[firstpage_image] =>[orig_patent_app_number] => 040450
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/040450 | LED array | Mar 17, 1998 | Issued |
Array
(
[id] => 4163031
[patent_doc_number] => 06114726
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-09-05
[patent_title] => 'Low voltage MOSFET'
[patent_app_type] => 1
[patent_app_number] => 9/038453
[patent_app_country] => US
[patent_app_date] => 1998-03-11
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/06/114/06114726.pdf
[firstpage_image] =>[orig_patent_app_number] => 038453
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/038453 | Low voltage MOSFET | Mar 10, 1998 | Issued |
Array
(
[id] => 4187190
[patent_doc_number] => 06020622
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-02-01
[patent_title] => 'Trench isolation for semiconductor device with lateral projections above substrate'
[patent_app_type] => 1
[patent_app_number] => 9/038111
[patent_app_country] => US
[patent_app_date] => 1998-03-11
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/020/06020622.pdf
[firstpage_image] =>[orig_patent_app_number] => 038111
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/038111 | Trench isolation for semiconductor device with lateral projections above substrate | Mar 10, 1998 | Issued |
Array
(
[id] => 4196354
[patent_doc_number] => 06130459
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-10-10
[patent_title] => 'Over-voltage protection device for integrated circuits'
[patent_app_type] => 1
[patent_app_number] => 9/037771
[patent_app_country] => US
[patent_app_date] => 1998-03-10
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[pdf_file] => patents/06/130/06130459.pdf
[firstpage_image] =>[orig_patent_app_number] => 037771
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/037771 | Over-voltage protection device for integrated circuits | Mar 9, 1998 | Issued |
Array
(
[id] => 4294180
[patent_doc_number] => 06211559
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-04-03
[patent_title] => 'Symmetric magnetic tunnel device'
[patent_app_type] => 1
[patent_app_number] => 9/032107
[patent_app_country] => US
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[pdf_file] => patents/06/211/06211559.pdf
[firstpage_image] =>[orig_patent_app_number] => 032107
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/032107 | Symmetric magnetic tunnel device | Feb 26, 1998 | Issued |
Array
(
[id] => 4190590
[patent_doc_number] => 06160297
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-12-12
[patent_title] => 'Semiconductor memory device having a first source line arranged between a memory cell string and bit lines in the direction crossing the bit lines and a second source line arranged in parallel to the bit lines'
[patent_app_type] => 1
[patent_app_number] => 9/017803
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[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/06/160/06160297.pdf
[firstpage_image] =>[orig_patent_app_number] => 017803
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/017803 | Semiconductor memory device having a first source line arranged between a memory cell string and bit lines in the direction crossing the bit lines and a second source line arranged in parallel to the bit lines | Feb 2, 1998 | Issued |
Array
(
[id] => 4242928
[patent_doc_number] => 06144092
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-11-07
[patent_title] => 'Electronic power device heatsink clamping system'
[patent_app_type] => 1
[patent_app_number] => 9/017643
[patent_app_country] => US
[patent_app_date] => 1998-02-02
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[pdf_file] => patents/06/144/06144092.pdf
[firstpage_image] =>[orig_patent_app_number] => 017643
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/017643 | Electronic power device heatsink clamping system | Feb 1, 1998 | Issued |
Array
(
[id] => 4414316
[patent_doc_number] => 06229192
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[patent_kind] => NA
[patent_issue_date] => 2001-05-08
[patent_title] => 'Image sensor or LCD including switching pin diodes'
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[pdf_file] => patents/06/229/06229192.pdf
[firstpage_image] =>[orig_patent_app_number] => 014380
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/014380 | Image sensor or LCD including switching pin diodes | Jan 26, 1998 | Issued |
Array
(
[id] => 4209775
[patent_doc_number] => 06078070
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-06-20
[patent_title] => 'Broadband backside illuminated MESFET with collecting microlens'
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[patent_app_number] => 9/004141
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[pdf_file] => patents/06/078/06078070.pdf
[firstpage_image] =>[orig_patent_app_number] => 004141
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/004141 | Broadband backside illuminated MESFET with collecting microlens | Jan 6, 1998 | Issued |
Array
(
[id] => 4423692
[patent_doc_number] => 06177716
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-01-23
[patent_title] => 'Low loss capacitor structure'
[patent_app_type] => 1
[patent_app_number] => 9/000510
[patent_app_country] => US
[patent_app_date] => 1997-12-30
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/177/06177716.pdf
[firstpage_image] =>[orig_patent_app_number] => 000510
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/000510 | Low loss capacitor structure | Dec 29, 1997 | Issued |