
Thomas E. Worden
Examiner (ID: 706)
| Most Active Art Unit | 3669 |
| Art Unit(s) | 3669, 3658, 3663 |
| Total Applications | 389 |
| Issued Applications | 225 |
| Pending Applications | 12 |
| Abandoned Applications | 151 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 6742989
[patent_doc_number] => 20030020172
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-01-30
[patent_title] => 'Semiconductor device and process for production thereof'
[patent_app_type] => new
[patent_app_number] => 10/252898
[patent_app_country] => US
[patent_app_date] => 2002-09-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 6813
[patent_no_of_claims] => 18
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[patent_words_short_claim] => 145
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0020/20030020172.pdf
[firstpage_image] =>[orig_patent_app_number] => 10252898
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/252898 | Semiconductor device and process for production thereof | Sep 22, 2002 | Abandoned |
Array
(
[id] => 6688533
[patent_doc_number] => 20030032258
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-02-13
[patent_title] => 'Isolation region forming methods'
[patent_app_type] => new
[patent_app_number] => 10/241923
[patent_app_country] => US
[patent_app_date] => 2002-09-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 4622
[patent_no_of_claims] => 48
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[pdf_file] => publications/A1/0032/20030032258.pdf
[firstpage_image] =>[orig_patent_app_number] => 10241923
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/241923 | Semiconductor construction of a trench | Sep 10, 2002 | Issued |
Array
(
[id] => 6745276
[patent_doc_number] => 20030022459
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[patent_kind] => A1
[patent_issue_date] => 2003-01-30
[patent_title] => 'Isolation region forming methods'
[patent_app_type] => new
[patent_app_number] => 10/241950
[patent_app_country] => US
[patent_app_date] => 2002-09-11
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0022/20030022459.pdf
[firstpage_image] =>[orig_patent_app_number] => 10241950
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/241950 | Isolation region forming methods | Sep 10, 2002 | Abandoned |
Array
(
[id] => 686630
[patent_doc_number] => 07078308
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-07-18
[patent_title] => 'Method and apparatus for removing adjacent conductive and nonconductive materials of a microelectronic substrate'
[patent_app_type] => utility
[patent_app_number] => 10/230628
[patent_app_country] => US
[patent_app_date] => 2002-08-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[patent_no_of_words] => 4131
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[pdf_file] => patents/07/078/07078308.pdf
[firstpage_image] =>[orig_patent_app_number] => 10230628
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/230628 | Method and apparatus for removing adjacent conductive and nonconductive materials of a microelectronic substrate | Aug 28, 2002 | Issued |
Array
(
[id] => 6856294
[patent_doc_number] => 20030129795
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-07-10
[patent_title] => 'Novel metal-gate electrode for CMOS transistor applications'
[patent_app_type] => new
[patent_app_number] => 10/230944
[patent_app_country] => US
[patent_app_date] => 2002-08-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[patent_no_of_words] => 3527
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[pdf_file] => publications/A1/0129/20030129795.pdf
[firstpage_image] =>[orig_patent_app_number] => 10230944
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/230944 | Metal-gate electrode for CMOS transistor applications | Aug 27, 2002 | Issued |
Array
(
[id] => 6745292
[patent_doc_number] => 20030022475
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-01-30
[patent_title] => 'Electrical connection between two surfaces of a substrate and method for producing same'
[patent_app_type] => new
[patent_app_number] => 10/204858
[patent_app_country] => US
[patent_app_date] => 2002-08-26
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[patent_drawing_sheets_cnt] => 7
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[pdf_file] => publications/A1/0022/20030022475.pdf
[firstpage_image] =>[orig_patent_app_number] => 10204858
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/204858 | Electrical connection between two faces of a substrate and manufacturing process | Aug 25, 2002 | Issued |
Array
(
[id] => 7183439
[patent_doc_number] => 20050161798
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-07-28
[patent_title] => 'Semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 10/509689
[patent_app_country] => US
[patent_app_date] => 2002-07-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
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[patent_no_of_words] => 5485
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[pdf_file] => publications/A1/0161/20050161798.pdf
[firstpage_image] =>[orig_patent_app_number] => 10509689
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/509689 | Semiconductor device | Jul 23, 2002 | Abandoned |
Array
(
[id] => 7427556
[patent_doc_number] => 20040007755
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-01-15
[patent_title] => 'Field oxide profile of an isolation region associated with a contact structure of a semiconductor device'
[patent_app_type] => new
[patent_app_number] => 10/193959
[patent_app_country] => US
[patent_app_date] => 2002-07-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[patent_no_of_words] => 3452
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[pdf_file] => publications/A1/0007/20040007755.pdf
[firstpage_image] =>[orig_patent_app_number] => 10193959
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/193959 | Field oxide profile of an isolation region associated with a contact structure of a semiconductor device | Jul 11, 2002 | Abandoned |
Array
(
[id] => 6755860
[patent_doc_number] => 20030003637
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-01-02
[patent_title] => 'Semiconductor device and its manufacturing method'
[patent_app_type] => new
[patent_app_number] => 10/183454
[patent_app_country] => US
[patent_app_date] => 2002-06-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
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[pdf_file] => publications/A1/0003/20030003637.pdf
[firstpage_image] =>[orig_patent_app_number] => 10183454
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/183454 | Trench gate power device having a concentration at channel layer higher than a base layer and uniformly distributed along the depth of the trench and its manufacturing method | Jun 27, 2002 | Issued |
Array
(
[id] => 6044344
[patent_doc_number] => 20020167049
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-11-14
[patent_title] => 'Field-effect transistor and manufacture thereof'
[patent_app_type] => new
[patent_app_number] => 10/185574
[patent_app_country] => US
[patent_app_date] => 2002-06-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
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[pdf_file] => publications/A1/0167/20020167049.pdf
[firstpage_image] =>[orig_patent_app_number] => 10185574
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/185574 | Field-effect transistor and manufacture thereof | Jun 26, 2002 | Abandoned |
Array
(
[id] => 1339824
[patent_doc_number] => 06589841
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-07-08
[patent_title] => 'Charge gain/charge loss junction leakage prevention for flash technology by using double isolation/capping layer between lightly doped drain and gate'
[patent_app_type] => B1
[patent_app_number] => 10/180772
[patent_app_country] => US
[patent_app_date] => 2002-06-25
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/06/589/06589841.pdf
[firstpage_image] =>[orig_patent_app_number] => 10180772
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/180772 | Charge gain/charge loss junction leakage prevention for flash technology by using double isolation/capping layer between lightly doped drain and gate | Jun 24, 2002 | Issued |
Array
(
[id] => 5782849
[patent_doc_number] => 20020158303
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-10-31
[patent_title] => 'Semiconductor device and method of fabricating same'
[patent_app_type] => new
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[patent_app_date] => 2002-06-19
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[firstpage_image] =>[orig_patent_app_number] => 10173666
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/173666 | Semiconductor device and method of fabricating same | Jun 18, 2002 | Abandoned |
Array
(
[id] => 8270798
[patent_doc_number] => 08212299
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-07-03
[patent_title] => 'Semiconductor device having a thin film capacitor of a MIM (metal-insulator-metal) structure'
[patent_app_type] => utility
[patent_app_number] => 10/170813
[patent_app_country] => US
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 10170813
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/170813 | Semiconductor device having a thin film capacitor of a MIM (metal-insulator-metal) structure | Jun 12, 2002 | Issued |
Array
(
[id] => 6563147
[patent_doc_number] => 20020164852
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-11-07
[patent_title] => 'Capacitor structures'
[patent_app_type] => new
[patent_app_number] => 10/171131
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[firstpage_image] =>[orig_patent_app_number] => 10171131
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/171131 | Capacitor structures | Jun 10, 2002 | Abandoned |
Array
(
[id] => 975476
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[patent_kind] => B2
[patent_issue_date] => 2005-08-23
[patent_title] => 'Process for doping a semiconductor body'
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[firstpage_image] =>[orig_patent_app_number] => 10170098
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/170098 | Process for doping a semiconductor body | Jun 10, 2002 | Issued |
Array
(
[id] => 6651234
[patent_doc_number] => 20030008462
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[patent_kind] => A1
[patent_issue_date] => 2003-01-09
[patent_title] => 'Insulated gate field effect transistor and manufacturing thereof'
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[firstpage_image] =>[orig_patent_app_number] => 10164074
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/164074 | Insulated gate field effect transistor and manufacturing thereof | Jun 6, 2002 | Abandoned |
Array
(
[id] => 6676889
[patent_doc_number] => 20030227029
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-12-11
[patent_title] => 'Elevated source and drain elements for strained-channel heterojuntion field-effect transistors'
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[patent_app_number] => 10/164988
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/164988 | Elevated source and drain elements for strained-channel heterojuntion field-effect transistors | Jun 6, 2002 | Issued |
Array
(
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[patent_title] => 'Planarization of non-planar surfaces in device fabrication'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/165263 | Methods for planarization of non-planar surfaces in device fabrication | Jun 5, 2002 | Issued |
Array
(
[id] => 1134215
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[patent_title] => 'Transistor formation for semiconductor devices'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/162289 | Transistor formation for semiconductor devices | Jun 2, 2002 | Issued |
Array
(
[id] => 6494633
[patent_doc_number] => 20020190367
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-12-19
[patent_title] => 'Slice interconnect structure'
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[patent_app_country] => US
[patent_app_date] => 2002-06-03
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0190/20020190367.pdf
[firstpage_image] =>[orig_patent_app_number] => 10161529
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/161529 | Slice interconnect structure | Jun 2, 2002 | Abandoned |