| Application number | Title of the application | Filing Date | Status |
|---|
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[patent_title] => 'Wafer surface that facilitates particle removal'
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Array
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[patent_title] => 'Chemical mechanical polishing of polysilicon plug using a silicon nitride stop layer'
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[patent_issue_date] => 2001-08-02
[patent_title] => 'Semiconductor device having protective layer on field oxide'
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Array
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[patent_title] => 'Low-cost, high-density light-emitting-diode array and fabrication method thereof'
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/746838 | Void reduction and increased throughput in trench fill processes | Dec 21, 2000 | Abandoned |
| 09/741949 | MOS transistor having improved total radiation-induced leakage current and method for fabricating same | Dec 19, 2000 | Abandoned |
Array
(
[id] => 1523696
[patent_doc_number] => 06352904
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[patent_kind] => B2
[patent_issue_date] => 2002-03-05
[patent_title] => 'Alignment mark strategy for oxide CMP'
[patent_app_type] => B2
[patent_app_number] => 09/726251
[patent_app_country] => US
[patent_app_date] => 2000-11-30
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[firstpage_image] =>[orig_patent_app_number] => 09726251
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/726251 | Alignment mark strategy for oxide CMP | Nov 29, 2000 | Issued |
| 09/714310 | Embedded gettering layer in shallow trench isolation structure | Nov 15, 2000 | Abandoned |
| 09/711629 | Method of forming a buried interconnect on a semiconductor on insulator wafer and a device including a buried interconnect | Nov 12, 2000 | Abandoned |
Array
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Array
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Array
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Array
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Array
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