Search

Thomas E. Worden

Examiner (ID: 706)

Most Active Art Unit
3669
Art Unit(s)
3669, 3658, 3663
Total Applications
389
Issued Applications
225
Pending Applications
12
Abandoned Applications
151

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7287216 [patent_doc_number] => 20040147055 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-29 [patent_title] => 'PHOTOELECTRIC CONVERSION DEVICE AND MANUFACTURING MEHTOD THEREFOR' [patent_app_type] => new [patent_app_number] => 09/342348 [patent_app_country] => US [patent_app_date] => 1999-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 5142 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0147/20040147055.pdf [firstpage_image] =>[orig_patent_app_number] => 09342348 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/342348
Method of fabricating a microfabricated high aspect ratio device with electrical isolation Jun 28, 1999 Issued
Array ( [id] => 4264996 [patent_doc_number] => 06204547 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-20 [patent_title] => 'Modified poly-buffered isolation' [patent_app_type] => 1 [patent_app_number] => 9/337982 [patent_app_country] => US [patent_app_date] => 1999-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 2682 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/204/06204547.pdf [firstpage_image] =>[orig_patent_app_number] => 337982 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/337982
Modified poly-buffered isolation Jun 21, 1999 Issued
Array ( [id] => 4173307 [patent_doc_number] => 06083851 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-04 [patent_title] => 'HSQ with high plasma etching resistance surface for borderless vias' [patent_app_type] => 1 [patent_app_number] => 9/332368 [patent_app_country] => US [patent_app_date] => 1999-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 4101 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/083/06083851.pdf [firstpage_image] =>[orig_patent_app_number] => 332368 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/332368
HSQ with high plasma etching resistance surface for borderless vias Jun 13, 1999 Issued
Array ( [id] => 6961358 [patent_doc_number] => 20010012675 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-08-09 [patent_title] => 'SHALLOW TRENCH ISOLATION PROCESS' [patent_app_type] => new [patent_app_number] => 09/326858 [patent_app_country] => US [patent_app_date] => 1999-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2485 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0012/20010012675.pdf [firstpage_image] =>[orig_patent_app_number] => 09326858 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/326858
SHALLOW TRENCH ISOLATION PROCESS Jun 6, 1999 Abandoned
Array ( [id] => 4358593 [patent_doc_number] => 06255194 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-03 [patent_title] => 'Trench isolation method' [patent_app_type] => 1 [patent_app_number] => 9/324919 [patent_app_country] => US [patent_app_date] => 1999-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 3827 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/255/06255194.pdf [firstpage_image] =>[orig_patent_app_number] => 324919 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/324919
Trench isolation method Jun 2, 1999 Issued
Array ( [id] => 4172514 [patent_doc_number] => 06083797 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-04 [patent_title] => 'Buried shallow trench isolation and method for forming the same' [patent_app_type] => 1 [patent_app_number] => 9/324858 [patent_app_country] => US [patent_app_date] => 1999-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2902 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/083/06083797.pdf [firstpage_image] =>[orig_patent_app_number] => 324858 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/324858
Buried shallow trench isolation and method for forming the same Jun 2, 1999 Issued
Array ( [id] => 6547957 [patent_doc_number] => 20020110994 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-08-15 [patent_title] => 'METHOD FOR FORMING TRENCH TYPE ISOLATION FILM USING ANNEALING' [patent_app_type] => new [patent_app_number] => 09/316029 [patent_app_country] => US [patent_app_date] => 1999-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3844 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0110/20020110994.pdf [firstpage_image] =>[orig_patent_app_number] => 09316029 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/316029
Method for forming trench type isolation film using annealing May 20, 1999 Issued
Array ( [id] => 4350544 [patent_doc_number] => 06291313 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-18 [patent_title] => 'Method and device for controlled cleaving process' [patent_app_type] => 1 [patent_app_number] => 9/313959 [patent_app_country] => US [patent_app_date] => 1999-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 30 [patent_no_of_words] => 13170 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/291/06291313.pdf [firstpage_image] =>[orig_patent_app_number] => 313959 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/313959
Method and device for controlled cleaving process May 17, 1999 Issued
Array ( [id] => 4182447 [patent_doc_number] => 06150238 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-21 [patent_title] => 'Method for fabricating a trench isolation' [patent_app_type] => 1 [patent_app_number] => 9/313129 [patent_app_country] => US [patent_app_date] => 1999-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 1242 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/150/06150238.pdf [firstpage_image] =>[orig_patent_app_number] => 313129 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/313129
Method for fabricating a trench isolation May 16, 1999 Issued
Array ( [id] => 6901524 [patent_doc_number] => 20010023107 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-09-20 [patent_title] => 'METHOD FOR FABRICATING A HYBRID ISOLATION STRUCTURE' [patent_app_type] => new [patent_app_number] => 09/299719 [patent_app_country] => US [patent_app_date] => 1999-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2757 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0023/20010023107.pdf [firstpage_image] =>[orig_patent_app_number] => 09299719 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/299719
METHOD FOR FABRICATING A HYBRID ISOLATION STRUCTURE Apr 25, 1999 Abandoned
Array ( [id] => 4131407 [patent_doc_number] => 06146973 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-14 [patent_title] => 'High density isolation using an implant as a polish stop' [patent_app_type] => 1 [patent_app_number] => 9/289669 [patent_app_country] => US [patent_app_date] => 1999-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 2067 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/146/06146973.pdf [firstpage_image] =>[orig_patent_app_number] => 289669 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/289669
High density isolation using an implant as a polish stop Apr 11, 1999 Issued
Array ( [id] => 1494938 [patent_doc_number] => 06403445 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-11 [patent_title] => 'Enhanced trench isolation structure' [patent_app_type] => B1 [patent_app_number] => 09/286729 [patent_app_country] => US [patent_app_date] => 1999-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 13 [patent_no_of_words] => 2571 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/403/06403445.pdf [firstpage_image] =>[orig_patent_app_number] => 09286729 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/286729
Enhanced trench isolation structure Apr 5, 1999 Issued
Array ( [id] => 4420318 [patent_doc_number] => 06225189 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-01 [patent_title] => 'Method of fabricating shallow trench isolation structure' [patent_app_type] => 1 [patent_app_number] => 9/282019 [patent_app_country] => US [patent_app_date] => 1999-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 1336 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/225/06225189.pdf [firstpage_image] =>[orig_patent_app_number] => 282019 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/282019
Method of fabricating shallow trench isolation structure Mar 28, 1999 Issued
09/254939 SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME Mar 16, 1999 Abandoned
Array ( [id] => 1585362 [patent_doc_number] => 06358778 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-19 [patent_title] => 'Semiconductor package comprising lead frame with punched parts for terminals' [patent_app_type] => B1 [patent_app_number] => 09/261488 [patent_app_country] => US [patent_app_date] => 1999-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 3209 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/358/06358778.pdf [firstpage_image] =>[orig_patent_app_number] => 09261488 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/261488
Semiconductor package comprising lead frame with punched parts for terminals Mar 2, 1999 Issued
Array ( [id] => 4063905 [patent_doc_number] => 06008090 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-28 [patent_title] => 'Method of forming high density flash memories with high capacitive-couping ratio and high speed operation' [patent_app_type] => 1 [patent_app_number] => 9/261027 [patent_app_country] => US [patent_app_date] => 1999-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 12 [patent_no_of_words] => 3373 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 389 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/008/06008090.pdf [firstpage_image] =>[orig_patent_app_number] => 261027 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/261027
Method of forming high density flash memories with high capacitive-couping ratio and high speed operation Mar 1, 1999 Issued
Array ( [id] => 6659710 [patent_doc_number] => 20030134485 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-17 [patent_title] => 'WELL-DRIVE ANNEAL TECHNIQUE USING PREPLACEMENT OF NITRIDE FILMS FOR ENHANCED FIELD ISOLATION' [patent_app_type] => new [patent_app_number] => 09/259145 [patent_app_country] => US [patent_app_date] => 1999-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 3259 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0134/20030134485.pdf [firstpage_image] =>[orig_patent_app_number] => 09259145 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/259145
Intermediate structure having a silicon barrier layer encapsulating a semiconductor substrate Feb 25, 1999 Issued
Array ( [id] => 7636050 [patent_doc_number] => 06380610 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-30 [patent_title] => 'Dislocation free local oxidation of silicon with suppression of narrow space field oxide thinning effect' [patent_app_type] => B1 [patent_app_number] => 09/257838 [patent_app_country] => US [patent_app_date] => 1999-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 3005 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 11 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/380/06380610.pdf [firstpage_image] =>[orig_patent_app_number] => 09257838 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/257838
Dislocation free local oxidation of silicon with suppression of narrow space field oxide thinning effect Feb 24, 1999 Issued
Array ( [id] => 4357635 [patent_doc_number] => 06191004 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-20 [patent_title] => 'Method of fabricating shallow trench isolation using high density plasma CVD' [patent_app_type] => 1 [patent_app_number] => 9/250749 [patent_app_country] => US [patent_app_date] => 1999-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 1589 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/191/06191004.pdf [firstpage_image] =>[orig_patent_app_number] => 250749 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/250749
Method of fabricating shallow trench isolation using high density plasma CVD Feb 15, 1999 Issued
Array ( [id] => 4169396 [patent_doc_number] => 06140208 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-31 [patent_title] => 'Shallow trench isolation (STI) with bilayer of oxide-nitride for VLSI applications' [patent_app_type] => 1 [patent_app_number] => 9/245958 [patent_app_country] => US [patent_app_date] => 1999-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 3257 [patent_no_of_claims] => 65 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/140/06140208.pdf [firstpage_image] =>[orig_patent_app_number] => 245958 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/245958
Shallow trench isolation (STI) with bilayer of oxide-nitride for VLSI applications Feb 4, 1999 Issued
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