Search

Thomas G Wyse

Examiner (ID: 9208)

Most Active Art Unit
1306
Art Unit(s)
2899, 1754, 1724, 1801, 1308, 1306, 3206
Total Applications
1702
Issued Applications
1475
Pending Applications
26
Abandoned Applications
201

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10778737 [patent_doc_number] => 20160124893 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-05-05 [patent_title] => 'INFORMATION PROCESSING APPARATUS AND METHOD OF CONTROLLING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/887533 [patent_app_country] => US [patent_app_date] => 2015-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5500 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14887533 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/887533
Information processing apparatus and method of controlling the same Oct 19, 2015 Issued
Array ( [id] => 11570410 [patent_doc_number] => 20170109054 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-04-20 [patent_title] => 'NONVOLATILE LOGIC MEMORY FOR COMPUTING MODULE RECONFIGURATION' [patent_app_type] => utility [patent_app_number] => 14/887885 [patent_app_country] => US [patent_app_date] => 2015-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3055 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14887885 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/887885
Nonvolatile logic memory for computing module reconfiguration Oct 19, 2015 Issued
Array ( [id] => 17135935 [patent_doc_number] => 11137486 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-10-05 [patent_title] => Parameter loader for ultrasound probe and related apparatus and methods [patent_app_type] => utility [patent_app_number] => 15/517211 [patent_app_country] => US [patent_app_date] => 2015-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 12609 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15517211 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/517211
Parameter loader for ultrasound probe and related apparatus and methods Oct 6, 2015 Issued
Array ( [id] => 11531160 [patent_doc_number] => 20170091138 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-30 [patent_title] => 'CIRCUIT MODULE CAPABLE OF ESTABLISHING ONE OR MORE LINKS WITH ANOTHER DEVICE AND ASSOCIATED METHOD' [patent_app_type] => utility [patent_app_number] => 14/870025 [patent_app_country] => US [patent_app_date] => 2015-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3210 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14870025 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/870025
CIRCUIT MODULE CAPABLE OF ESTABLISHING ONE OR MORE LINKS WITH ANOTHER DEVICE AND ASSOCIATED METHOD Sep 29, 2015 Abandoned
Array ( [id] => 10416754 [patent_doc_number] => 20150301764 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-22 [patent_title] => 'Hard Disk and Methods for Forwarding and Acquiring Data by Hard Disk' [patent_app_type] => utility [patent_app_number] => 14/753242 [patent_app_country] => US [patent_app_date] => 2015-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3273 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14753242 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/753242
Hard Disk and Methods for Forwarding and Acquiring Data by Hard Disk Jun 28, 2015 Abandoned
Array ( [id] => 16232720 [patent_doc_number] => 10740270 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-11 [patent_title] => Self-tune controller [patent_app_type] => utility [patent_app_number] => 15/578521 [patent_app_country] => US [patent_app_date] => 2015-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6764 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15578521 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/578521
Self-tune controller Jun 25, 2015 Issued
Array ( [id] => 10991311 [patent_doc_number] => 20160188256 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-30 [patent_title] => 'COMPUTING SYSTEM WITH PROCESSING AND METHOD OF OPERATION THEREOF' [patent_app_type] => utility [patent_app_number] => 14/749298 [patent_app_country] => US [patent_app_date] => 2015-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6147 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14749298 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/749298
Computing system with processing and method of operation thereof Jun 23, 2015 Issued
Array ( [id] => 12713350 [patent_doc_number] => 20180129616 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-10 [patent_title] => SYSTEMS AND METHODS FOR ISOLATING INPUT/OUTPUT COMPUTING RESOURCES [patent_app_type] => utility [patent_app_number] => 15/573114 [patent_app_country] => US [patent_app_date] => 2015-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11225 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15573114 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/573114
Systems and methods for isolating input/output computing resources Jun 23, 2015 Issued
Array ( [id] => 10487408 [patent_doc_number] => 20150372429 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-24 [patent_title] => 'PLUG CONNECTOR, ELECTRONIC APPARATUS INCLUDING RECEPTACLE AND CONNECTING METHOD OF ELECTRONIC APPARATUS' [patent_app_type] => utility [patent_app_number] => 14/749029 [patent_app_country] => US [patent_app_date] => 2015-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 11827 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14749029 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/749029
PLUG CONNECTOR, ELECTRONIC APPARATUS INCLUDING RECEPTACLE AND CONNECTING METHOD OF ELECTRONIC APPARATUS Jun 23, 2015 Abandoned
Array ( [id] => 11739148 [patent_doc_number] => 09703731 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-07-11 [patent_title] => 'Data transfer apparatus and data transfer method' [patent_app_type] => utility [patent_app_number] => 14/746570 [patent_app_country] => US [patent_app_date] => 2015-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 50 [patent_no_of_words] => 21236 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 406 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14746570 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/746570
Data transfer apparatus and data transfer method Jun 21, 2015 Issued
Array ( [id] => 14735301 [patent_doc_number] => 10387050 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-20 [patent_title] => System and method for providing accessibility for access controller storage media [patent_app_type] => utility [patent_app_number] => 14/746418 [patent_app_country] => US [patent_app_date] => 2015-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 6031 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14746418 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/746418
System and method for providing accessibility for access controller storage media Jun 21, 2015 Issued
Array ( [id] => 10672733 [patent_doc_number] => 20160018878 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-01-21 [patent_title] => 'Methods and Systems for Multiple Bus Generator and Load Control' [patent_app_type] => utility [patent_app_number] => 14/744077 [patent_app_country] => US [patent_app_date] => 2015-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 8336 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14744077 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/744077
Methods and systems for multiple bus generator and load control Jun 18, 2015 Issued
Array ( [id] => 11501662 [patent_doc_number] => 20170075847 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-16 [patent_title] => 'INTERCHANGEABLE I/O MODULES WITH INDIVIDUAL AND SHARED PERSONALITIES' [patent_app_type] => utility [patent_app_number] => 14/723821 [patent_app_country] => US [patent_app_date] => 2015-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5765 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14723821 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/723821
Interchangeable I/O modules with individual and shared personalities May 27, 2015 Issued
Array ( [id] => 10393127 [patent_doc_number] => 20150278134 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-01 [patent_title] => 'CLOCK CONTROL FOR DMA BUSSES' [patent_app_type] => utility [patent_app_number] => 14/709336 [patent_app_country] => US [patent_app_date] => 2015-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8616 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14709336 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/709336
Clock control for DMA busses May 10, 2015 Issued
Array ( [id] => 11903448 [patent_doc_number] => 09772883 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-09-26 [patent_title] => 'Device operability enhancement with alternative device utilization' [patent_app_type] => utility [patent_app_number] => 14/696876 [patent_app_country] => US [patent_app_date] => 2015-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 9591 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14696876 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/696876
Device operability enhancement with alternative device utilization Apr 26, 2015 Issued
Array ( [id] => 11102887 [patent_doc_number] => 20160299858 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-13 [patent_title] => 'PROCESSING OF EVENTS FOR ACCELERATORS UTILIZED FOR PARALLEL PROCESSING' [patent_app_type] => utility [patent_app_number] => 14/680219 [patent_app_country] => US [patent_app_date] => 2015-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7195 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14680219 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/680219
Processing of events for accelerators utilized for parallel processing Apr 6, 2015 Issued
Array ( [id] => 10327753 [patent_doc_number] => 20150212757 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-30 [patent_title] => 'MANAGING A NETWORKED STORAGE CONFIGURATION' [patent_app_type] => utility [patent_app_number] => 14/680058 [patent_app_country] => US [patent_app_date] => 2015-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3787 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14680058 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/680058
Managing a networked storage configuration Apr 5, 2015 Issued
Array ( [id] => 11465566 [patent_doc_number] => 09582197 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-02-28 [patent_title] => 'Method and system for hybrid direct input/output (I/O) with a storage device' [patent_app_type] => utility [patent_app_number] => 14/663109 [patent_app_country] => US [patent_app_date] => 2015-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4541 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14663109 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/663109
Method and system for hybrid direct input/output (I/O) with a storage device Mar 18, 2015 Issued
Array ( [id] => 12108234 [patent_doc_number] => 09864719 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-01-09 [patent_title] => 'Systems and methods for power optimization at input/output nodes of an information handling system' [patent_app_type] => utility [patent_app_number] => 14/645657 [patent_app_country] => US [patent_app_date] => 2015-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 8273 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14645657 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/645657
Systems and methods for power optimization at input/output nodes of an information handling system Mar 11, 2015 Issued
Array ( [id] => 13029361 [patent_doc_number] => 10037301 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-07-31 [patent_title] => Circuits and methods for inter-processor communication [patent_app_type] => utility [patent_app_number] => 14/638692 [patent_app_country] => US [patent_app_date] => 2015-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5849 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14638692 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/638692
Circuits and methods for inter-processor communication Mar 3, 2015 Issued
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