Search

Thomas J. Cleary

Examiner (ID: 8694, Phone: (571)272-3624 , Office: P/2185 )

Most Active Art Unit
2111
Art Unit(s)
2186, 2185, 2111, 2175
Total Applications
995
Issued Applications
689
Pending Applications
50
Abandoned Applications
270

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20026828 [patent_doc_number] => 20250165050 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-22 [patent_title] => FRAME-BASED, LOW POWER INTERFACES BETWEEN DEVICES WITH DIFFERENT I/O SIGNALS [patent_app_type] => utility [patent_app_number] => 19/033728 [patent_app_country] => US [patent_app_date] => 2025-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19033728 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/033728
FRAME-BASED, LOW POWER INTERFACES BETWEEN DEVICES WITH DIFFERENT I/O SIGNALS Jan 21, 2025 Pending
Array ( [id] => 20500729 [patent_doc_number] => 20260030190 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-01-29 [patent_title] => METHOD AND SYSTEM FOR PROVIDING CONFIGURATION DATA TO A FIELD-PROGRAMMABLE GATE ARRAY VIA MULTIPLE PROTOCOL MODES [patent_app_type] => utility [patent_app_number] => 19/019359 [patent_app_country] => US [patent_app_date] => 2025-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2320 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19019359 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/019359
METHOD AND SYSTEM FOR PROVIDING CONFIGURATION DATA TO A FIELD-PROGRAMMABLE GATE ARRAY VIA MULTIPLE PROTOCOL MODES Jan 12, 2025 Pending
Array ( [id] => 19992396 [patent_doc_number] => 20250130618 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-24 [patent_title] => ENERGY EFFICIENCY MANAGEMENT METHOD AND APPARATUS, COMPUTING DEVICE, AND COMPUTER-READABLE STORAGE MEDIUM [patent_app_type] => utility [patent_app_number] => 19/001216 [patent_app_country] => US [patent_app_date] => 2024-12-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20652 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19001216 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/001216
ENERGY EFFICIENCY MANAGEMENT METHOD AND APPARATUS, COMPUTING DEVICE, AND COMPUTER-READABLE STORAGE MEDIUM Dec 23, 2024 Pending
Array ( [id] => 19878279 [patent_doc_number] => 20250110536 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-03 [patent_title] => ELECTRONIC DEVICE AND METHOD FOR ADJUSTING FREQUENCIES OF RESPECTIVE CIRCUITS INCLUDED IN PROCESSOR, AND COMPUTER-READABALE STORAGE MEDIUM [patent_app_type] => utility [patent_app_number] => 18/977918 [patent_app_country] => US [patent_app_date] => 2024-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17719 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18977918 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/977918
ELECTRONIC DEVICE AND METHOD FOR ADJUSTING FREQUENCIES OF RESPECTIVE CIRCUITS INCLUDED IN PROCESSOR, AND COMPUTER-READABALE STORAGE MEDIUM Dec 11, 2024 Pending
Array ( [id] => 19756284 [patent_doc_number] => 20250044849 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-06 [patent_title] => Decentralized Power Architecture [patent_app_type] => utility [patent_app_number] => 18/922384 [patent_app_country] => US [patent_app_date] => 2024-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 23758 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18922384 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/922384
Decentralized Power Architecture Oct 21, 2024 Pending
Array ( [id] => 20556807 [patent_doc_number] => 20260056591 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-02-26 [patent_title] => INTERRUPTING A NETWORK POWER-DOWN SEQUENCE IN A PROCESSOR-BASED SYSTEM TO SERVICE A CLIENT REQUEST [patent_app_type] => utility [patent_app_number] => 18/809879 [patent_app_country] => US [patent_app_date] => 2024-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4397 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18809879 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/809879
INTERRUPTING A NETWORK POWER-DOWN SEQUENCE IN A PROCESSOR-BASED SYSTEM TO SERVICE A CLIENT REQUEST Aug 19, 2024 Pending
Array ( [id] => 20500569 [patent_doc_number] => 20260030029 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-01-29 [patent_title] => BIOS ENTITLEMENT RETENTION SYSTEM AND METHOD FOR MOTHERBOARD REPLACEMENT USING RECOVERY PARTITION [patent_app_type] => utility [patent_app_number] => 18/780624 [patent_app_country] => US [patent_app_date] => 2024-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1150 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18780624 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/780624
BIOS ENTITLEMENT RETENTION SYSTEM AND METHOD FOR MOTHERBOARD REPLACEMENT USING RECOVERY PARTITION Jul 22, 2024 Pending
Array ( [id] => 20487373 [patent_doc_number] => 20260023572 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-01-22 [patent_title] => BIOS ENTITLEMENT RETENTION SYSTEM AND METHOD FOR MOTHERBOARD REPLACEMENT USING QR CODES [patent_app_type] => utility [patent_app_number] => 18/777654 [patent_app_country] => US [patent_app_date] => 2024-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1143 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18777654 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/777654
BIOS ENTITLEMENT RETENTION SYSTEM AND METHOD FOR MOTHERBOARD REPLACEMENT USING QR CODES Jul 18, 2024 Pending
Array ( [id] => 20408595 [patent_doc_number] => 20250377704 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-12-11 [patent_title] => ELECTRONIC DEVICE FOR COMMUNICATING WITH HOST AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/764083 [patent_app_country] => US [patent_app_date] => 2024-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1065 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18764083 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/764083
ELECTRONIC DEVICE FOR COMMUNICATING WITH HOST AND OPERATING METHOD THEREOF Jul 2, 2024 Pending
Array ( [id] => 19686216 [patent_doc_number] => 20250004761 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-02 [patent_title] => METHOD AND SYSTEM FOR ACCESSING REGISTERS OF A DEVICE [patent_app_type] => utility [patent_app_number] => 18/752030 [patent_app_country] => US [patent_app_date] => 2024-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5772 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18752030 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/752030
METHOD AND SYSTEM FOR ACCESSING REGISTERS OF A DEVICE Jun 23, 2024 Pending
Array ( [id] => 19576205 [patent_doc_number] => 20240380497 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-14 [patent_title] => HDMI MATRIX SWITCHER RECEIVING SIDE AND RECEIVER-SIDE FIBER CONNECTOR POWER MANAGEMENT [patent_app_type] => utility [patent_app_number] => 18/677310 [patent_app_country] => US [patent_app_date] => 2024-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4637 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18677310 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/677310
HDMI MATRIX SWITCHER RECEIVING SIDE AND RECEIVER-SIDE FIBER CONNECTOR POWER MANAGEMENT May 28, 2024 Abandoned
Array ( [id] => 20395287 [patent_doc_number] => 20250370762 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-12-04 [patent_title] => SYSTEMS AND METHODS FOR SHARED AND SCALABLE DISPLAY CONTROLLER WITHOUT PERIPHERAL COMPONENT INTERCONNECT INTERFACE [patent_app_type] => utility [patent_app_number] => 18/675447 [patent_app_country] => US [patent_app_date] => 2024-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18675447 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/675447
Systems and methods for shared and scalable display controller without peripheral component interconnect interface May 27, 2024 Issued
Array ( [id] => 19588110 [patent_doc_number] => 20240385667 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-21 [patent_title] => In-Vehicle Consumer Device Charging Network [patent_app_type] => utility [patent_app_number] => 18/667337 [patent_app_country] => US [patent_app_date] => 2024-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9001 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 14 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18667337 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/667337
In-Vehicle Consumer Device Charging Network May 16, 2024 Pending
Array ( [id] => 19419788 [patent_doc_number] => 20240295911 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-05 [patent_title] => SYNCHRONOUS POWER STATE CONTROL SCHEME FOR MULTI-CHIP INTEGRATED POWER MANAGEMENT SOLUTION IN EMBEDDED SYSTEMS [patent_app_type] => utility [patent_app_number] => 18/663655 [patent_app_country] => US [patent_app_date] => 2024-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8337 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18663655 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/663655
SYNCHRONOUS POWER STATE CONTROL SCHEME FOR MULTI-CHIP INTEGRATED POWER MANAGEMENT SOLUTION IN EMBEDDED SYSTEMS May 13, 2024 Issued
Array ( [id] => 19848582 [patent_doc_number] => 20250093933 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-20 [patent_title] => INFORMATION PROCESSING APPARATUS AND METHOD PERFORMED THEREBY [patent_app_type] => utility [patent_app_number] => 18/660203 [patent_app_country] => US [patent_app_date] => 2024-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4207 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18660203 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/660203
Information processing apparatus and method performed thereby May 8, 2024 Issued
Array ( [id] => 19405407 [patent_doc_number] => 20240288918 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-29 [patent_title] => HIGHLY ADAPTABLE POWER SYSTEM [patent_app_type] => utility [patent_app_number] => 18/652902 [patent_app_country] => US [patent_app_date] => 2024-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5635 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18652902 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/652902
Highly adaptable power system May 1, 2024 Issued
Array ( [id] => 20337756 [patent_doc_number] => 20250341876 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-11-06 [patent_title] => POWER SUPPLY CONFIGURATION BASED POWER CAPPING [patent_app_type] => utility [patent_app_number] => 18/652449 [patent_app_country] => US [patent_app_date] => 2024-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4654 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18652449 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/652449
POWER SUPPLY CONFIGURATION BASED POWER CAPPING Apr 30, 2024 Pending
Array ( [id] => 19985443 [patent_doc_number] => 20250123665 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-17 [patent_title] => MULTI-PORT POWER DELIVERY SYSTEM AND POWER ALLOCATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/629994 [patent_app_country] => US [patent_app_date] => 2024-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18629994 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/629994
MULTI-PORT POWER DELIVERY SYSTEM AND POWER ALLOCATION METHOD THEREOF Apr 8, 2024 Pending
Array ( [id] => 20292824 [patent_doc_number] => 20250318067 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-09 [patent_title] => Computer Rack Power Supply Redundancy [patent_app_type] => utility [patent_app_number] => 18/629635 [patent_app_country] => US [patent_app_date] => 2024-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2236 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18629635 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/629635
Computer Rack Power Supply Redundancy Apr 7, 2024 Pending
Array ( [id] => 20454513 [patent_doc_number] => 12517565 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-06 [patent_title] => Time synchronization of collecting and reporting power events between hierarchical power throttling circuits in a hierarchical power management system [patent_app_type] => utility [patent_app_number] => 18/626683 [patent_app_country] => US [patent_app_date] => 2024-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 28597 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 261 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18626683 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/626683
Time synchronization of collecting and reporting power events between hierarchical power throttling circuits in a hierarchical power management system Apr 3, 2024 Issued
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