Search

Thomas J. Cleary

Examiner (ID: 47, Phone: (571)272-3624 , Office: P/2185 )

Most Active Art Unit
2111
Art Unit(s)
2111, 2185, 2186, 2175
Total Applications
982
Issued Applications
676
Pending Applications
59
Abandoned Applications
268

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17931966 [patent_doc_number] => 20220327091 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-13 [patent_title] => TWO-WIRE HOST INTERFACE [patent_app_type] => utility [patent_app_number] => 17/639417 [patent_app_country] => US [patent_app_date] => 2020-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 22766 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -38 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17639417 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/639417
Two-wire host interface Sep 10, 2020 Issued
Array ( [id] => 16690687 [patent_doc_number] => 20210073165 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-11 [patent_title] => COMMUNICATING NON-ISOCHRONOUS DATA OVER AN ISOCHRONOUS CHANNEL [patent_app_type] => utility [patent_app_number] => 17/014099 [patent_app_country] => US [patent_app_date] => 2020-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6131 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17014099 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/014099
Communicating non-isochronous data over an isochronous channel Sep 7, 2020 Issued
Array ( [id] => 16721952 [patent_doc_number] => 20210089099 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-25 [patent_title] => ELECTRONIC DEVICE SUPPORTING CONNECTION WITH EXTERNAL DEVICE AND POWER CONSUMPTION REDUCING METHOD WHEN USING ELECTRONIC DEVICE IN CONNECTION WITH EXTERNAL DEVICE [patent_app_type] => utility [patent_app_number] => 16/947548 [patent_app_country] => US [patent_app_date] => 2020-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11818 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16947548 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/947548
Electronic device supporting connection with external device and power consumption reducing method when using electronic device in connection with external device Aug 5, 2020 Issued
Array ( [id] => 17279108 [patent_doc_number] => 20210385306 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-09 [patent_title] => MULTI-CHIP SYSTEM AND DATA TRANSMISSION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/939090 [patent_app_country] => US [patent_app_date] => 2020-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6114 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -28 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16939090 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/939090
Multi-chip system and data transmission method thereof Jul 26, 2020 Issued
Array ( [id] => 16810581 [patent_doc_number] => 20210133136 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-06 [patent_title] => IMAGE PROCESSING CHIP [patent_app_type] => utility [patent_app_number] => 16/921996 [patent_app_country] => US [patent_app_date] => 2020-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6045 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 340 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16921996 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/921996
Image processing chip Jul 6, 2020 Issued
Array ( [id] => 17316670 [patent_doc_number] => 20210405719 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-30 [patent_title] => SIMPLIFYING POWER SEQUENCING FOR INTEGRATED CIRCUITS [patent_app_type] => utility [patent_app_number] => 16/912539 [patent_app_country] => US [patent_app_date] => 2020-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8960 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16912539 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/912539
Simplifying power sequencing for integrated circuits Jun 24, 2020 Issued
Array ( [id] => 17491972 [patent_doc_number] => 11281274 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-22 [patent_title] => Method for USB power receiving device selecting power supply option [patent_app_type] => utility [patent_app_number] => 16/908918 [patent_app_country] => US [patent_app_date] => 2020-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4365 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16908918 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/908918
Method for USB power receiving device selecting power supply option Jun 22, 2020 Issued
Array ( [id] => 17892255 [patent_doc_number] => 11455226 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-09-27 [patent_title] => Uninterrupted power supply (UPS) with power management for self-service terminals (SSTs) [patent_app_type] => utility [patent_app_number] => 16/905565 [patent_app_country] => US [patent_app_date] => 2020-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4951 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16905565 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/905565
Uninterrupted power supply (UPS) with power management for self-service terminals (SSTs) Jun 17, 2020 Issued
Array ( [id] => 16514634 [patent_doc_number] => 20200393892 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-17 [patent_title] => APPARATUS, METHOD, AND RECORDING MEDIUM [patent_app_type] => utility [patent_app_number] => 16/897034 [patent_app_country] => US [patent_app_date] => 2020-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4418 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16897034 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/897034
Apparatus, method, and recording medium for shifting a power mode to a power saving mode based on an interrupt signal Jun 8, 2020 Issued
Array ( [id] => 16949963 [patent_doc_number] => 20210208655 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-08 [patent_title] => ELECTRONIC DEVICE, CHARGING METHOD AND DEVICE, AND COMPUTER-READABLE STORAGE MEDIUM [patent_app_type] => utility [patent_app_number] => 16/893414 [patent_app_country] => US [patent_app_date] => 2020-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9445 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16893414 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/893414
Electronic device, charging method and device, and computer-readable storage medium Jun 3, 2020 Issued
Array ( [id] => 16439190 [patent_doc_number] => 20200356516 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-12 [patent_title] => RECONFIGURABLE TRANSMITTER [patent_app_type] => utility [patent_app_number] => 16/882408 [patent_app_country] => US [patent_app_date] => 2020-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8973 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16882408 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/882408
Reconfigurable transmitter May 21, 2020 Issued
Array ( [id] => 16439091 [patent_doc_number] => 20200356417 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-12 [patent_title] => SYSTEMS AND METHODS FOR PCI LOAD BALANCING [patent_app_type] => utility [patent_app_number] => 16/872685 [patent_app_country] => US [patent_app_date] => 2020-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8534 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16872685 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/872685
Systems and methods for PCI load balancing May 11, 2020 Issued
Array ( [id] => 16178911 [patent_doc_number] => 20200225879 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-16 [patent_title] => BANDWIDTH LIMITING IN SOLID STATE DRIVES [patent_app_type] => utility [patent_app_number] => 16/832402 [patent_app_country] => US [patent_app_date] => 2020-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11049 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16832402 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/832402
Bandwidth limiting in solid state drives Mar 26, 2020 Issued
Array ( [id] => 17698740 [patent_doc_number] => 11372462 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-06-28 [patent_title] => Protected power and data bus connection of peripheral device and host device [patent_app_type] => utility [patent_app_number] => 16/828065 [patent_app_country] => US [patent_app_date] => 2020-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3948 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16828065 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/828065
Protected power and data bus connection of peripheral device and host device Mar 23, 2020 Issued
Array ( [id] => 16346356 [patent_doc_number] => 20200311007 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-01 [patent_title] => CIRCUIT DEVICE, CIRCUIT DEVICE DETERMINATION METHOD, AND ELECTRONIC APPARATUS [patent_app_type] => utility [patent_app_number] => 16/828022 [patent_app_country] => US [patent_app_date] => 2020-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6214 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16828022 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/828022
Circuit device, circuit device determination method, and electronic apparatus Mar 23, 2020 Issued
Array ( [id] => 16160449 [patent_doc_number] => 20200218457 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-09 [patent_title] => Extensible Storage System And Method [patent_app_type] => utility [patent_app_number] => 16/821918 [patent_app_country] => US [patent_app_date] => 2020-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7159 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16821918 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/821918
Extensible storage system and method Mar 16, 2020 Issued
Array ( [id] => 17098953 [patent_doc_number] => 20210286744 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-16 [patent_title] => PROGRAMMABLE INPUT/OUTPUT PORT [patent_app_type] => utility [patent_app_number] => 16/820497 [patent_app_country] => US [patent_app_date] => 2020-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6630 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16820497 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/820497
PROGRAMMABLE INPUT/OUTPUT PORT Mar 15, 2020 Abandoned
Array ( [id] => 16345855 [patent_doc_number] => 20200310506 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-01 [patent_title] => POWER AND DATA HUB, COMMUNICATION SYSTEM, AND RELATED METHOD [patent_app_type] => utility [patent_app_number] => 16/817596 [patent_app_country] => US [patent_app_date] => 2020-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8420 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16817596 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/817596
Power and data hub, communication system, and related method Mar 11, 2020 Issued
Array ( [id] => 16330890 [patent_doc_number] => 20200301856 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-24 [patent_title] => VARIABLE READ LATENCY ON A SERIAL MEMORY BUS [patent_app_type] => utility [patent_app_number] => 16/810241 [patent_app_country] => US [patent_app_date] => 2020-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9010 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16810241 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/810241
Variable read latency on a serial memory bus Mar 4, 2020 Issued
Array ( [id] => 16345857 [patent_doc_number] => 20200310508 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-01 [patent_title] => CONTROL OF THE POWER SUPPLY OVER A USB TYPE-C BUS [patent_app_type] => utility [patent_app_number] => 16/809404 [patent_app_country] => US [patent_app_date] => 2020-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5381 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16809404 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/809404
CONTROL OF THE POWER SUPPLY OVER A USB TYPE-C BUS Mar 3, 2020 Abandoned
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