Search

Thomas J. Cleary

Examiner (ID: 8694, Phone: (571)272-3624 , Office: P/2185 )

Most Active Art Unit
2111
Art Unit(s)
2186, 2185, 2111, 2175
Total Applications
995
Issued Applications
689
Pending Applications
50
Abandoned Applications
270

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17892255 [patent_doc_number] => 11455226 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-09-27 [patent_title] => Uninterrupted power supply (UPS) with power management for self-service terminals (SSTs) [patent_app_type] => utility [patent_app_number] => 16/905565 [patent_app_country] => US [patent_app_date] => 2020-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4951 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16905565 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/905565
Uninterrupted power supply (UPS) with power management for self-service terminals (SSTs) Jun 17, 2020 Issued
Array ( [id] => 16514634 [patent_doc_number] => 20200393892 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-17 [patent_title] => APPARATUS, METHOD, AND RECORDING MEDIUM [patent_app_type] => utility [patent_app_number] => 16/897034 [patent_app_country] => US [patent_app_date] => 2020-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4418 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16897034 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/897034
Apparatus, method, and recording medium for shifting a power mode to a power saving mode based on an interrupt signal Jun 8, 2020 Issued
Array ( [id] => 16949963 [patent_doc_number] => 20210208655 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-08 [patent_title] => ELECTRONIC DEVICE, CHARGING METHOD AND DEVICE, AND COMPUTER-READABLE STORAGE MEDIUM [patent_app_type] => utility [patent_app_number] => 16/893414 [patent_app_country] => US [patent_app_date] => 2020-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9445 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16893414 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/893414
Electronic device, charging method and device, and computer-readable storage medium Jun 3, 2020 Issued
Array ( [id] => 16439190 [patent_doc_number] => 20200356516 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-12 [patent_title] => RECONFIGURABLE TRANSMITTER [patent_app_type] => utility [patent_app_number] => 16/882408 [patent_app_country] => US [patent_app_date] => 2020-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8973 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16882408 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/882408
Reconfigurable transmitter May 21, 2020 Issued
Array ( [id] => 16439091 [patent_doc_number] => 20200356417 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-12 [patent_title] => SYSTEMS AND METHODS FOR PCI LOAD BALANCING [patent_app_type] => utility [patent_app_number] => 16/872685 [patent_app_country] => US [patent_app_date] => 2020-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8534 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16872685 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/872685
Systems and methods for PCI load balancing May 11, 2020 Issued
Array ( [id] => 16178911 [patent_doc_number] => 20200225879 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-16 [patent_title] => BANDWIDTH LIMITING IN SOLID STATE DRIVES [patent_app_type] => utility [patent_app_number] => 16/832402 [patent_app_country] => US [patent_app_date] => 2020-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11049 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16832402 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/832402
Bandwidth limiting in solid state drives Mar 26, 2020 Issued
Array ( [id] => 16346356 [patent_doc_number] => 20200311007 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-01 [patent_title] => CIRCUIT DEVICE, CIRCUIT DEVICE DETERMINATION METHOD, AND ELECTRONIC APPARATUS [patent_app_type] => utility [patent_app_number] => 16/828022 [patent_app_country] => US [patent_app_date] => 2020-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6214 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16828022 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/828022
Circuit device, circuit device determination method, and electronic apparatus Mar 23, 2020 Issued
Array ( [id] => 17698740 [patent_doc_number] => 11372462 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-06-28 [patent_title] => Protected power and data bus connection of peripheral device and host device [patent_app_type] => utility [patent_app_number] => 16/828065 [patent_app_country] => US [patent_app_date] => 2020-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3948 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16828065 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/828065
Protected power and data bus connection of peripheral device and host device Mar 23, 2020 Issued
Array ( [id] => 16160449 [patent_doc_number] => 20200218457 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-09 [patent_title] => Extensible Storage System And Method [patent_app_type] => utility [patent_app_number] => 16/821918 [patent_app_country] => US [patent_app_date] => 2020-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7159 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16821918 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/821918
Extensible storage system and method Mar 16, 2020 Issued
Array ( [id] => 17098953 [patent_doc_number] => 20210286744 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-16 [patent_title] => PROGRAMMABLE INPUT/OUTPUT PORT [patent_app_type] => utility [patent_app_number] => 16/820497 [patent_app_country] => US [patent_app_date] => 2020-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6630 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16820497 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/820497
PROGRAMMABLE INPUT/OUTPUT PORT Mar 15, 2020 Abandoned
Array ( [id] => 16345855 [patent_doc_number] => 20200310506 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-01 [patent_title] => POWER AND DATA HUB, COMMUNICATION SYSTEM, AND RELATED METHOD [patent_app_type] => utility [patent_app_number] => 16/817596 [patent_app_country] => US [patent_app_date] => 2020-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8420 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16817596 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/817596
Power and data hub, communication system, and related method Mar 11, 2020 Issued
Array ( [id] => 16330890 [patent_doc_number] => 20200301856 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-24 [patent_title] => VARIABLE READ LATENCY ON A SERIAL MEMORY BUS [patent_app_type] => utility [patent_app_number] => 16/810241 [patent_app_country] => US [patent_app_date] => 2020-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9010 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16810241 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/810241
Variable read latency on a serial memory bus Mar 4, 2020 Issued
Array ( [id] => 17078752 [patent_doc_number] => 11115176 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-09-07 [patent_title] => System and method for adjusting clock-data timing in a multi-lane data communication link [patent_app_type] => utility [patent_app_number] => 16/809477 [patent_app_country] => US [patent_app_date] => 2020-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6568 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16809477 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/809477
System and method for adjusting clock-data timing in a multi-lane data communication link Mar 3, 2020 Issued
Array ( [id] => 16345857 [patent_doc_number] => 20200310508 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-01 [patent_title] => CONTROL OF THE POWER SUPPLY OVER A USB TYPE-C BUS [patent_app_type] => utility [patent_app_number] => 16/809404 [patent_app_country] => US [patent_app_date] => 2020-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5381 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16809404 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/809404
CONTROL OF THE POWER SUPPLY OVER A USB TYPE-C BUS Mar 3, 2020 Abandoned
Array ( [id] => 17491970 [patent_doc_number] => 11281272 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-22 [patent_title] => Reducing standby power in a switch mode power supply [patent_app_type] => utility [patent_app_number] => 16/809467 [patent_app_country] => US [patent_app_date] => 2020-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8078 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 364 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16809467 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/809467
Reducing standby power in a switch mode power supply Mar 3, 2020 Issued
Array ( [id] => 17180185 [patent_doc_number] => 11157429 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-10-26 [patent_title] => Time and event based message transmission [patent_app_type] => utility [patent_app_number] => 16/805949 [patent_app_country] => US [patent_app_date] => 2020-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8146 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16805949 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/805949
Time and event based message transmission Mar 1, 2020 Issued
Array ( [id] => 16077707 [patent_doc_number] => 20200192840 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-18 [patent_title] => CUSTOM COMPUTE CORES IN INTEGRATED CIRCUIT DEVICES [patent_app_type] => utility [patent_app_number] => 16/799484 [patent_app_country] => US [patent_app_date] => 2020-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18204 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16799484 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/799484
Custom compute cores in integrated circuit devices Feb 23, 2020 Issued
Array ( [id] => 17038719 [patent_doc_number] => 20210255678 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-19 [patent_title] => MODE SELECTION CIRCUIT FOR LOW-COST INTEGRATED CIRCUITS SUCH AS MICROCONTROLLERS [patent_app_type] => utility [patent_app_number] => 16/791210 [patent_app_country] => US [patent_app_date] => 2020-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4387 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16791210 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/791210
Mode selection circuit for low-cost integrated circuits such as microcontrollers Feb 13, 2020 Issued
Array ( [id] => 17024227 [patent_doc_number] => 20210248098 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-12 [patent_title] => Protocol Data Unit End Handling with Fractional Data Alignment and Arbitration Fairness [patent_app_type] => utility [patent_app_number] => 16/786190 [patent_app_country] => US [patent_app_date] => 2020-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6704 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16786190 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/786190
Protocol data unit end handling with fractional data alignment and arbitration fairness Feb 9, 2020 Issued
Array ( [id] => 17283151 [patent_doc_number] => 11200180 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-14 [patent_title] => NVMe SGL bit bucket transfers [patent_app_type] => utility [patent_app_number] => 16/778177 [patent_app_country] => US [patent_app_date] => 2020-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7100 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16778177 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/778177
NVMe SGL bit bucket transfers Jan 30, 2020 Issued
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