Search

Thomas J. Hiltunen

Examiner (ID: 11261, Phone: (571)272-5525 , Office: P/2842 )

Most Active Art Unit
2849
Art Unit(s)
2842, 2816, 2849
Total Applications
1585
Issued Applications
1246
Pending Applications
93
Abandoned Applications
273

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 12047914 [patent_doc_number] => 09825526 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-11-21 [patent_title] => 'Semiconductor device and electronic device' [patent_app_type] => utility [patent_app_number] => 15/350516 [patent_app_country] => US [patent_app_date] => 2016-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 27 [patent_no_of_words] => 15963 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15350516 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/350516
Semiconductor device and electronic device Nov 13, 2016 Issued
Array ( [id] => 11446610 [patent_doc_number] => 20170047631 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-02-16 [patent_title] => 'HIGH FREQUENCY BAND PASS FILTER WITH COUPLED SURFACE MOUNT TRANSITION' [patent_app_type] => utility [patent_app_number] => 15/340573 [patent_app_country] => US [patent_app_date] => 2016-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4655 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15340573 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/340573
High frequency band pass filter with coupled surface mount transition Oct 31, 2016 Issued
Array ( [id] => 11446079 [patent_doc_number] => 20170047100 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-02-16 [patent_title] => 'Integrated Circuit Device Body Boas Circuits and Methods' [patent_app_type] => utility [patent_app_number] => 15/337876 [patent_app_country] => US [patent_app_date] => 2016-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 9870 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15337876 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/337876
Integrated circuit device body bias circuits and methods Oct 27, 2016 Issued
Array ( [id] => 11437794 [patent_doc_number] => 20170038815 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-02-09 [patent_title] => 'SYSTEM MAXIMUM CURRENT PROTECTION' [patent_app_type] => utility [patent_app_number] => 15/331051 [patent_app_country] => US [patent_app_date] => 2016-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7500 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15331051 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/331051
System maximum current protection Oct 20, 2016 Issued
Array ( [id] => 11608976 [patent_doc_number] => 20170126281 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-05-04 [patent_title] => 'PACKAGING AND DETAILS OF A WIRELESS POWER DEVICE' [patent_app_type] => utility [patent_app_number] => 15/284254 [patent_app_country] => US [patent_app_date] => 2016-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 14621 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15284254 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/284254
PACKAGING AND DETAILS OF A WIRELESS POWER DEVICE Oct 2, 2016 Abandoned
Array ( [id] => 12597960 [patent_doc_number] => 20180091150 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-29 [patent_title] => FUSED VOLTAGE LEVEL SHIFTING LATCH [patent_app_type] => utility [patent_app_number] => 15/277189 [patent_app_country] => US [patent_app_date] => 2016-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7425 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15277189 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/277189
FUSED VOLTAGE LEVEL SHIFTING LATCH Sep 26, 2016 Abandoned
Array ( [id] => 13044349 [patent_doc_number] => 10044321 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-08-07 [patent_title] => System and method for linearizing a transmitter by rejecting harmonics at mixer output [patent_app_type] => utility [patent_app_number] => 15/277534 [patent_app_country] => US [patent_app_date] => 2016-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 18 [patent_no_of_words] => 10297 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 311 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15277534 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/277534
System and method for linearizing a transmitter by rejecting harmonics at mixer output Sep 26, 2016 Issued
Array ( [id] => 11926288 [patent_doc_number] => 09793883 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-10-17 [patent_title] => 'Valley detection circuit and drive circuit' [patent_app_type] => utility [patent_app_number] => 15/276355 [patent_app_country] => US [patent_app_date] => 2016-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 6196 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15276355 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/276355
Valley detection circuit and drive circuit Sep 25, 2016 Issued
Array ( [id] => 13244425 [patent_doc_number] => 10135432 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-11-20 [patent_title] => Methods and apparatus for low current control for a power connection [patent_app_type] => utility [patent_app_number] => 15/275875 [patent_app_country] => US [patent_app_date] => 2016-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 4926 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15275875 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/275875
Methods and apparatus for low current control for a power connection Sep 25, 2016 Issued
Array ( [id] => 12597891 [patent_doc_number] => 20180091127 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-29 [patent_title] => DELAY CIRCUITS [patent_app_type] => utility [patent_app_number] => 15/274278 [patent_app_country] => US [patent_app_date] => 2016-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3197 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15274278 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/274278
DELAY CIRCUITS Sep 22, 2016 Abandoned
Array ( [id] => 12991825 [patent_doc_number] => 20170346395 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-30 [patent_title] => SYSTEM AND METHOD FOR CONTROLLING POWER MODULE [patent_app_type] => utility [patent_app_number] => 15/272791 [patent_app_country] => US [patent_app_date] => 2016-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3795 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15272791 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/272791
SYSTEM AND METHOD FOR CONTROLLING POWER MODULE Sep 21, 2016 Abandoned
Array ( [id] => 12230330 [patent_doc_number] => 09917584 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-03-13 [patent_title] => 'Voltage converter integrated circuit with an integrated bootstrap capacitor' [patent_app_type] => utility [patent_app_number] => 15/272412 [patent_app_country] => US [patent_app_date] => 2016-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 5625 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15272412 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/272412
Voltage converter integrated circuit with an integrated bootstrap capacitor Sep 20, 2016 Issued
Array ( [id] => 12316431 [patent_doc_number] => 09941867 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-04-10 [patent_title] => Circuit and method for universal pulse latch [patent_app_type] => utility [patent_app_number] => 15/270437 [patent_app_country] => US [patent_app_date] => 2016-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 3559 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15270437 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/270437
Circuit and method for universal pulse latch Sep 19, 2016 Issued
Array ( [id] => 12264433 [patent_doc_number] => 20180083629 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-22 [patent_title] => 'INTEGRATED LEVEL TRANSLATOR AND LATCH FOR FENCE ARCHITECTURE' [patent_app_type] => utility [patent_app_number] => 15/269139 [patent_app_country] => US [patent_app_date] => 2016-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2916 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15269139 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/269139
Integrated level translator and latch for fence architecture Sep 18, 2016 Issued
Array ( [id] => 13030383 [patent_doc_number] => 10037814 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-07-31 [patent_title] => Track and hold with active charge cancellation [patent_app_type] => utility [patent_app_number] => 15/261303 [patent_app_country] => US [patent_app_date] => 2016-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3768 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15261303 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/261303
Track and hold with active charge cancellation Sep 8, 2016 Issued
Array ( [id] => 11503618 [patent_doc_number] => 20170077803 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-16 [patent_title] => 'PRECHARGE SWITCH-CAPACITOR CIRCUIT AND METHOD' [patent_app_type] => utility [patent_app_number] => 15/260602 [patent_app_country] => US [patent_app_date] => 2016-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7881 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15260602 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/260602
Precharge switch-capacitor circuit and method Sep 8, 2016 Issued
Array ( [id] => 12970699 [patent_doc_number] => 09876489 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-01-23 [patent_title] => Method of implementing a differential integrating phase interpolator [patent_app_type] => utility [patent_app_number] => 15/258696 [patent_app_country] => US [patent_app_date] => 2016-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 15 [patent_no_of_words] => 8101 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 292 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15258696 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/258696
Method of implementing a differential integrating phase interpolator Sep 6, 2016 Issued
Array ( [id] => 13884883 [patent_doc_number] => 10194973 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-02-05 [patent_title] => Generator for digitally generating electrical signal waveforms for electrosurgical and ultrasonic surgical instruments [patent_app_type] => utility [patent_app_number] => 15/258569 [patent_app_country] => US [patent_app_date] => 2016-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 23 [patent_no_of_words] => 33690 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15258569 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/258569
Generator for digitally generating electrical signal waveforms for electrosurgical and ultrasonic surgical instruments Sep 6, 2016 Issued
Array ( [id] => 12257490 [patent_doc_number] => 09929646 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-03-27 [patent_title] => 'Charge pump circuit and step-down regulator circuit' [patent_app_type] => utility [patent_app_number] => 15/253880 [patent_app_country] => US [patent_app_date] => 2016-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 21 [patent_no_of_words] => 4552 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15253880 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/253880
Charge pump circuit and step-down regulator circuit Aug 31, 2016 Issued
Array ( [id] => 13668659 [patent_doc_number] => 10164517 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-12-25 [patent_title] => Voltage regulator with jitter control [patent_app_type] => utility [patent_app_number] => 15/239606 [patent_app_country] => US [patent_app_date] => 2016-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5927 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15239606 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/239606
Voltage regulator with jitter control Aug 16, 2016 Issued
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