Search

Thomas J. Mullen

Examiner (ID: 17198, Phone: (571)272-2965 , Office: P/2685 )

Most Active Art Unit
2685
Art Unit(s)
2612, 2685, 2632, 2787, 3616, 2617, 2736, 1724, 2608
Total Applications
2648
Issued Applications
2205
Pending Applications
106
Abandoned Applications
342

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18889997 [patent_doc_number] => 11868770 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-09 [patent_title] => Computer processor for higher precision computations using a mixed-precision decomposition of operations [patent_app_type] => utility [patent_app_number] => 18/091157 [patent_app_country] => US [patent_app_date] => 2022-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 38 [patent_no_of_words] => 25126 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18091157 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/091157
Computer processor for higher precision computations using a mixed-precision decomposition of operations Dec 28, 2022 Issued
Array ( [id] => 19841957 [patent_doc_number] => 12254348 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-18 [patent_title] => Information processing apparatus, information processing method, and recording medium for performing inference processing using an inference model [patent_app_type] => utility [patent_app_number] => 18/090639 [patent_app_country] => US [patent_app_date] => 2022-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 15 [patent_no_of_words] => 14087 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18090639 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/090639
Information processing apparatus, information processing method, and recording medium for performing inference processing using an inference model Dec 28, 2022 Issued
Array ( [id] => 18974007 [patent_doc_number] => 20240054099 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-15 [patent_title] => Cluster-Based Placement and Routing of Memory Units and Compute Units in a Reconfigurable Computing Grid [patent_app_type] => utility [patent_app_number] => 18/083362 [patent_app_country] => US [patent_app_date] => 2022-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11901 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18083362 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/083362
Cluster-based placement and routing of memory units and compute units in a reconfigurable computing grid Dec 15, 2022 Issued
Array ( [id] => 18305852 [patent_doc_number] => 20230109752 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-13 [patent_title] => DETERMINISTIC REPLAY OF A MULTI-THREADED TRACE ON A MULTI-THREADED PROCESSOR [patent_app_type] => utility [patent_app_number] => 18/064225 [patent_app_country] => US [patent_app_date] => 2022-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 36423 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18064225 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/064225
Deterministic replay of a multi-threaded trace on a multi-threaded processor Dec 8, 2022 Issued
Array ( [id] => 19136886 [patent_doc_number] => 11971844 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-30 [patent_title] => Chiplet system and positioning method thereof [patent_app_type] => utility [patent_app_number] => 18/070514 [patent_app_country] => US [patent_app_date] => 2022-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 2840 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18070514 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/070514
Chiplet system and positioning method thereof Nov 28, 2022 Issued
Array ( [id] => 18270190 [patent_doc_number] => 20230091432 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-23 [patent_title] => Thread Creation on Local or Remote Compute Elements by a Multi-Threaded, Self-Scheduling Processor [patent_app_type] => utility [patent_app_number] => 17/994143 [patent_app_country] => US [patent_app_date] => 2022-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 25239 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17994143 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/994143
Thread creation on local or remote compute elements by a multi-threaded, self-scheduling processor Nov 24, 2022 Issued
Array ( [id] => 19189894 [patent_doc_number] => 20240168807 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-23 [patent_title] => CROSS-THREAD REGISTER SHARING FOR MATRIX MULTIPLICATION COMPUTE [patent_app_type] => utility [patent_app_number] => 18/056949 [patent_app_country] => US [patent_app_date] => 2022-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 52625 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18056949 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/056949
CROSS-THREAD REGISTER SHARING FOR MATRIX MULTIPLICATION COMPUTE Nov 17, 2022 Pending
Array ( [id] => 19443417 [patent_doc_number] => 12093688 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-17 [patent_title] => Multibit shift instruction [patent_app_type] => utility [patent_app_number] => 17/989067 [patent_app_country] => US [patent_app_date] => 2022-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 10216 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17989067 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/989067
Multibit shift instruction Nov 16, 2022 Issued
Array ( [id] => 18257483 [patent_doc_number] => 20230084523 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-16 [patent_title] => Data Processing Method and Device, and Storage Medium [patent_app_type] => utility [patent_app_number] => 17/989141 [patent_app_country] => US [patent_app_date] => 2022-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6918 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17989141 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/989141
Data Processing Method and Device, and Storage Medium Nov 16, 2022 Abandoned
Array ( [id] => 19053096 [patent_doc_number] => 20240095065 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-21 [patent_title] => Multi-stage Thread Scheduling [patent_app_type] => utility [patent_app_number] => 18/054376 [patent_app_country] => US [patent_app_date] => 2022-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15948 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18054376 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/054376
Multi-stage thread scheduling Nov 9, 2022 Issued
Array ( [id] => 18422402 [patent_doc_number] => 20230176866 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-08 [patent_title] => MULTIBIT SHIFT INSTRUCTION [patent_app_type] => utility [patent_app_number] => 17/982980 [patent_app_country] => US [patent_app_date] => 2022-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10203 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17982980 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/982980
MULTIBIT SHIFT INSTRUCTION Nov 7, 2022 Abandoned
Array ( [id] => 18286099 [patent_doc_number] => 20230101571 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-30 [patent_title] => DEVICES, METHODS, AND MEDIA FOR EFFICIENT DATA DEPENDENCY MANAGEMENT FOR IN-ORDER ISSUE PROCESSORS [patent_app_type] => utility [patent_app_number] => 18/050719 [patent_app_country] => US [patent_app_date] => 2022-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12048 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 22 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18050719 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/050719
DEVICES, METHODS, AND MEDIA FOR EFFICIENT DATA DEPENDENCY MANAGEMENT FOR IN-ORDER ISSUE PROCESSORS Oct 27, 2022 Abandoned
Array ( [id] => 19942086 [patent_doc_number] => 12314215 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2025-05-27 [patent_title] => Digital signal processor (DSP) with global and local interconnect architecture and reconfigurable hardware accelerator core [patent_app_type] => utility [patent_app_number] => 17/967444 [patent_app_country] => US [patent_app_date] => 2022-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 0 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 338 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17967444 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/967444
Digital signal processor (DSP) with global and local interconnect architecture and reconfigurable hardware accelerator core Oct 16, 2022 Issued
Array ( [id] => 18166750 [patent_doc_number] => 20230033355 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-02 [patent_title] => SYNCHRONIZING SCHEDULING TASKS WITH ATOMIC ALU [patent_app_type] => utility [patent_app_number] => 17/965161 [patent_app_country] => US [patent_app_date] => 2022-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16131 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17965161 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/965161
Synchronizing scheduling tasks with atomic ALU Oct 12, 2022 Issued
Array ( [id] => 18307451 [patent_doc_number] => 20230111351 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-13 [patent_title] => TOPOLOGY OF ACCELERATORS [patent_app_type] => utility [patent_app_number] => 17/964256 [patent_app_country] => US [patent_app_date] => 2022-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5719 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17964256 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/964256
Topology of accelerators Oct 11, 2022 Issued
Array ( [id] => 18802925 [patent_doc_number] => 11836082 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-05 [patent_title] => Neural processing device and load/store method of neural processing device [patent_app_type] => utility [patent_app_number] => 17/938024 [patent_app_country] => US [patent_app_date] => 2022-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 32 [patent_no_of_words] => 20814 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17938024 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/938024
Neural processing device and load/store method of neural processing device Oct 3, 2022 Issued
Array ( [id] => 19443419 [patent_doc_number] => 12093690 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-17 [patent_title] => Look-up table read [patent_app_type] => utility [patent_app_number] => 17/952517 [patent_app_country] => US [patent_app_date] => 2022-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 40 [patent_no_of_words] => 23695 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17952517 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/952517
Look-up table read Sep 25, 2022 Issued
Array ( [id] => 19053065 [patent_doc_number] => 20240095034 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-21 [patent_title] => SELECTIVE CONTROL FLOW PREDICTOR INSERTION [patent_app_type] => utility [patent_app_number] => 17/949874 [patent_app_country] => US [patent_app_date] => 2022-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7174 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17949874 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/949874
Selective control flow predictor insertion Sep 20, 2022 Issued
Array ( [id] => 18145002 [patent_doc_number] => 20230018857 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-19 [patent_title] => SPARSITY PROCESSING ON UNPACKED DATA [patent_app_type] => utility [patent_app_number] => 17/947642 [patent_app_country] => US [patent_app_date] => 2022-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19815 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17947642 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/947642
SPARSITY PROCESSING ON UNPACKED DATA Sep 18, 2022 Pending
Array ( [id] => 19045755 [patent_doc_number] => 11934870 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-19 [patent_title] => Method for scheduling a set of computing tasks in a supercomputer [patent_app_type] => utility [patent_app_number] => 17/943385 [patent_app_country] => US [patent_app_date] => 2022-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 5858 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 278 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17943385 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/943385
Method for scheduling a set of computing tasks in a supercomputer Sep 12, 2022 Issued
Menu