
Thomas J. Mullen
Examiner (ID: 17198, Phone: (571)272-2965 , Office: P/2685 )
| Most Active Art Unit | 2685 |
| Art Unit(s) | 2612, 2685, 2632, 2787, 3616, 2617, 2736, 1724, 2608 |
| Total Applications | 2648 |
| Issued Applications | 2205 |
| Pending Applications | 106 |
| Abandoned Applications | 342 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 19327934
[patent_doc_number] => 12045622
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-07-23
[patent_title] => Input channel processing for triggered-instruction processing element
[patent_app_type] => utility
[patent_app_number] => 17/941404
[patent_app_country] => US
[patent_app_date] => 2022-09-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 14
[patent_no_of_words] => 17446
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 264
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17941404
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/941404 | Input channel processing for triggered-instruction processing element | Sep 8, 2022 | Issued |
Array
(
[id] => 19243732
[patent_doc_number] => 12014176
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-06-18
[patent_title] => Apparatus and method for pipeline control
[patent_app_type] => utility
[patent_app_number] => 17/903057
[patent_app_country] => US
[patent_app_date] => 2022-09-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 7716
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 196
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17903057
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/903057 | Apparatus and method for pipeline control | Sep 5, 2022 | Issued |
Array
(
[id] => 19933585
[patent_doc_number] => 12306789
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-05-20
[patent_title] => Performance islands for CPU clusters
[patent_app_type] => utility
[patent_app_number] => 17/893913
[patent_app_country] => US
[patent_app_date] => 2022-08-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 2116
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 163
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17893913
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/893913 | Performance islands for CPU clusters | Aug 22, 2022 | Issued |
Array
(
[id] => 20079815
[patent_doc_number] => 12353884
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-07-08
[patent_title] => Cross-linking method and apparatus, electronic device and storage medium
[patent_app_type] => utility
[patent_app_number] => 18/277532
[patent_app_country] => US
[patent_app_date] => 2022-08-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 1016
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 138
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18277532
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/277532 | Cross-linking method and apparatus, electronic device and storage medium | Aug 16, 2022 | Issued |
Array
(
[id] => 19942584
[patent_doc_number] => 12314716
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-05-27
[patent_title] => Computer-implemented systems and methods for serialisation of arithmetic circuits
[patent_app_type] => utility
[patent_app_number] => 17/887447
[patent_app_country] => US
[patent_app_date] => 2022-08-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 6275
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 136
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17887447
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/887447 | Computer-implemented systems and methods for serialisation of arithmetic circuits | Aug 12, 2022 | Issued |
Array
(
[id] => 18803339
[patent_doc_number] => 11836498
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2023-12-05
[patent_title] => Single cycle predictor
[patent_app_type] => utility
[patent_app_number] => 17/879281
[patent_app_country] => US
[patent_app_date] => 2022-08-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 15
[patent_no_of_words] => 23956
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 199
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17879281
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/879281 | Single cycle predictor | Aug 1, 2022 | Issued |
Array
(
[id] => 18238268
[patent_doc_number] => 20230070579
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-03-09
[patent_title] => SYSTEMS AND METHODS TO SKIP INCONSEQUENTIAL MATRIX OPERATIONS
[patent_app_type] => utility
[patent_app_number] => 17/878427
[patent_app_country] => US
[patent_app_date] => 2022-08-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 27210
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -21
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17878427
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/878427 | Systems and methods to skip inconsequential matrix operations | Jul 31, 2022 | Issued |
Array
(
[id] => 18881279
[patent_doc_number] => 20240004648
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-01-04
[patent_title] => VECTOR UNPACK BASED ON SELECTION INFORMATION
[patent_app_type] => utility
[patent_app_number] => 17/856981
[patent_app_country] => US
[patent_app_date] => 2022-07-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13700
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 112
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17856981
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/856981 | VECTOR UNPACK BASED ON SELECTION INFORMATION | Jul 1, 2022 | Pending |
Array
(
[id] => 19538601
[patent_doc_number] => 12131154
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-10-29
[patent_title] => Systems and methods for performing instructions to convert to 16-bit floating-point format
[patent_app_type] => utility
[patent_app_number] => 17/851468
[patent_app_country] => US
[patent_app_date] => 2022-06-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
[patent_figures_cnt] => 29
[patent_no_of_words] => 18354
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 196
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17851468
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/851468 | Systems and methods for performing instructions to convert to 16-bit floating-point format | Jun 27, 2022 | Issued |
Array
(
[id] => 18864173
[patent_doc_number] => 20230418609
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-12-28
[patent_title] => CONTROL FLOW PREDICTION USING POINTERS
[patent_app_type] => utility
[patent_app_number] => 17/851266
[patent_app_country] => US
[patent_app_date] => 2022-06-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8537
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -12
[patent_words_short_claim] => 87
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17851266
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/851266 | Control flow prediction using pointers | Jun 27, 2022 | Issued |
Array
(
[id] => 18934446
[patent_doc_number] => 11886880
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-01-30
[patent_title] => Data processing apparatus and related products with descriptor management
[patent_app_type] => utility
[patent_app_number] => 17/849182
[patent_app_country] => US
[patent_app_date] => 2022-06-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 30
[patent_no_of_words] => 77502
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 129
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17849182
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/849182 | Data processing apparatus and related products with descriptor management | Jun 23, 2022 | Issued |
Array
(
[id] => 19228729
[patent_doc_number] => 12008367
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-06-11
[patent_title] => Systems and methods for performing 16-bit floating-point vector dot product instructions
[patent_app_type] => utility
[patent_app_number] => 17/845103
[patent_app_country] => US
[patent_app_date] => 2022-06-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 24
[patent_no_of_words] => 16131
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 108
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17845103
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/845103 | Systems and methods for performing 16-bit floating-point vector dot product instructions | Jun 20, 2022 | Issued |
Array
(
[id] => 18846922
[patent_doc_number] => 20230409326
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-12-21
[patent_title] => DEVICE, METHOD AND SYSTEM FOR EXECUTING A TILE LOAD AND EXPAND INSTRUCTION
[patent_app_type] => utility
[patent_app_number] => 17/841558
[patent_app_country] => US
[patent_app_date] => 2022-06-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 20245
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 132
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17841558
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/841558 | DEVICE, METHOD AND SYSTEM FOR EXECUTING A TILE LOAD AND EXPAND INSTRUCTION | Jun 14, 2022 | Issued |
Array
(
[id] => 18832540
[patent_doc_number] => 20230401067
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-12-14
[patent_title] => CONCURRENTLY FETCHING INSTRUCTIONS FOR MULTIPLE DECODE CLUSTERS
[patent_app_type] => utility
[patent_app_number] => 17/840029
[patent_app_country] => US
[patent_app_date] => 2022-06-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10959
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17840029
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/840029 | CONCURRENTLY FETCHING INSTRUCTIONS FOR MULTIPLE DECODE CLUSTERS | Jun 13, 2022 | Pending |
Array
(
[id] => 18773179
[patent_doc_number] => 20230368008
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-11-16
[patent_title] => MEMORY-EFFICIENT STREAMING CONVOLUTIONS IN NEURAL NETWORK PROCESSOR
[patent_app_type] => utility
[patent_app_number] => 17/745032
[patent_app_country] => US
[patent_app_date] => 2022-05-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10865
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 234
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17745032
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/745032 | Memory-efficient streaming convolutions in neural network processor | May 15, 2022 | Issued |
Array
(
[id] => 18007017
[patent_doc_number] => 20220365783
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-11-17
[patent_title] => MATRIX MULTIPLICATION AND ACCUMULATION OPERATIONS ON COMPRESSED MATRICES
[patent_app_type] => utility
[patent_app_number] => 17/743334
[patent_app_country] => US
[patent_app_date] => 2022-05-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 53680
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -24
[patent_words_short_claim] => 31
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17743334
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/743334 | MATRIX MULTIPLICATION AND ACCUMULATION OPERATIONS ON COMPRESSED MATRICES | May 11, 2022 | Pending |
Array
(
[id] => 18890002
[patent_doc_number] => 11868775
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-01-09
[patent_title] => Encoding and decoding variable length instructions
[patent_app_type] => utility
[patent_app_number] => 17/737537
[patent_app_country] => US
[patent_app_date] => 2022-05-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 17156
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 123
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17737537
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/737537 | Encoding and decoding variable length instructions | May 4, 2022 | Issued |
Array
(
[id] => 18386478
[patent_doc_number] => 11657261
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2023-05-23
[patent_title] => Neural processing device and method for synchronization thereof
[patent_app_type] => utility
[patent_app_number] => 17/661414
[patent_app_country] => US
[patent_app_date] => 2022-04-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 30
[patent_figures_cnt] => 30
[patent_no_of_words] => 17977
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 175
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17661414
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/661414 | Neural processing device and method for synchronization thereof | Apr 28, 2022 | Issued |
Array
(
[id] => 18941724
[patent_doc_number] => 20240036863
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-02-01
[patent_title] => VECTOR READING AND WRITING METHOD, VECTOR REGISTER SYSTEM, DEVICE, AND MEDIUM
[patent_app_type] => utility
[patent_app_number] => 18/278807
[patent_app_country] => US
[patent_app_date] => 2022-04-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8562
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 228
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18278807
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/278807 | Vector reading and writing method, vector register system, device, and medium | Apr 27, 2022 | Issued |
Array
(
[id] => 19703882
[patent_doc_number] => 12197918
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-01-14
[patent_title] => Command-aware hardware architecture
[patent_app_type] => utility
[patent_app_number] => 17/724282
[patent_app_country] => US
[patent_app_date] => 2022-04-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 13004
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 123
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17724282
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/724282 | Command-aware hardware architecture | Apr 18, 2022 | Issued |