Search

Thomas J Visone

Examiner (ID: 14957, Phone: (571)270-7144 , Office: P/1651 )

Most Active Art Unit
1651
Art Unit(s)
1651, 1699, 4112
Total Applications
539
Issued Applications
253
Pending Applications
58
Abandoned Applications
228

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4104515 [patent_doc_number] => 06134275 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-17 [patent_title] => 'Method for transmitting data between a terminal and a portable data carrier over a wireless electromagnetic transmission link' [patent_app_type] => 1 [patent_app_number] => 9/256283 [patent_app_country] => US [patent_app_date] => 1999-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3276 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/134/06134275.pdf [firstpage_image] =>[orig_patent_app_number] => 256283 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/256283
Method for transmitting data between a terminal and a portable data carrier over a wireless electromagnetic transmission link Feb 22, 1999 Issued
Array ( [id] => 1356113 [patent_doc_number] => 06587531 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-07-01 [patent_title] => 'Clock recovery circuit and a receiver having a clock recovery circuit' [patent_app_type] => B1 [patent_app_number] => 09/252692 [patent_app_country] => US [patent_app_date] => 1999-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 2519 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/587/06587531.pdf [firstpage_image] =>[orig_patent_app_number] => 09252692 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/252692
Clock recovery circuit and a receiver having a clock recovery circuit Feb 17, 1999 Issued
Array ( [id] => 1483311 [patent_doc_number] => 06452967 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-17 [patent_title] => 'Method and device for reducing coupling effects between neighboring telephone devices' [patent_app_type] => B1 [patent_app_number] => 09/251839 [patent_app_country] => US [patent_app_date] => 1999-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7811 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/452/06452967.pdf [firstpage_image] =>[orig_patent_app_number] => 09251839 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/251839
Method and device for reducing coupling effects between neighboring telephone devices Feb 16, 1999 Issued
Array ( [id] => 652485 [patent_doc_number] => 07113549 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-09-26 [patent_title] => 'In, or relating to, VDSL' [patent_app_type] => utility [patent_app_number] => 09/622523 [patent_app_country] => US [patent_app_date] => 1999-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4352 [patent_no_of_claims] => 46 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/113/07113549.pdf [firstpage_image] =>[orig_patent_app_number] => 09622523 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/622523
In, or relating to, VDSL Feb 16, 1999 Issued
Array ( [id] => 1316202 [patent_doc_number] => 06618451 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-09 [patent_title] => 'Efficient reduced state maximum likelihood sequence estimator' [patent_app_type] => B1 [patent_app_number] => 09/249990 [patent_app_country] => US [patent_app_date] => 1999-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 5516 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 14 [patent_words_short_claim] => 20 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/618/06618451.pdf [firstpage_image] =>[orig_patent_app_number] => 09249990 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/249990
Efficient reduced state maximum likelihood sequence estimator Feb 12, 1999 Issued
Array ( [id] => 1413117 [patent_doc_number] => 06532268 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-03-11 [patent_title] => 'Receiving apparatus and transmitting/receiving system' [patent_app_type] => B1 [patent_app_number] => 09/247943 [patent_app_country] => US [patent_app_date] => 1999-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 3950 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/532/06532268.pdf [firstpage_image] =>[orig_patent_app_number] => 09247943 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/247943
Receiving apparatus and transmitting/receiving system Feb 10, 1999 Issued
Array ( [id] => 1408838 [patent_doc_number] => 06549568 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-04-15 [patent_title] => 'Method and apparatus for automatically adjusting the transmit power of data communication equipment operating in a multipoint environment' [patent_app_type] => B1 [patent_app_number] => 09/248149 [patent_app_country] => US [patent_app_date] => 1999-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4444 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/549/06549568.pdf [firstpage_image] =>[orig_patent_app_number] => 09248149 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/248149
Method and apparatus for automatically adjusting the transmit power of data communication equipment operating in a multipoint environment Feb 9, 1999 Issued
09/155789 METHOD FOR TRANSMITTING DIGITAL SIGNALS BY CORRELATED FREQUENCIES Feb 8, 1999 Abandoned
09/242251 DEMODULATOR WITH DIGITAL CIRCUIT FOR RECOVERING CARRIER AND RHYTHM Feb 4, 1999 Abandoned
Array ( [id] => 1442964 [patent_doc_number] => 06496545 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-17 [patent_title] => 'Single side-band mixer' [patent_app_type] => B1 [patent_app_number] => 09/241992 [patent_app_country] => US [patent_app_date] => 1999-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 6114 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 239 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/496/06496545.pdf [firstpage_image] =>[orig_patent_app_number] => 09241992 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/241992
Single side-band mixer Feb 1, 1999 Issued
Array ( [id] => 1550830 [patent_doc_number] => 06445756 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-03 [patent_title] => 'Peak detecting circuit for detecting a peak of a time discrete signal by an approximate function' [patent_app_type] => B1 [patent_app_number] => 09/241290 [patent_app_country] => US [patent_app_date] => 1999-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 36 [patent_no_of_words] => 9727 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/445/06445756.pdf [firstpage_image] =>[orig_patent_app_number] => 09241290 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/241290
Peak detecting circuit for detecting a peak of a time discrete signal by an approximate function Jan 31, 1999 Issued
Array ( [id] => 1525786 [patent_doc_number] => 06353631 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-05 [patent_title] => 'Quadrature amplitude modulation signal demodulation circuit having improved interference detection circuit' [patent_app_type] => B1 [patent_app_number] => 09/241089 [patent_app_country] => US [patent_app_date] => 1999-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 2648 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/353/06353631.pdf [firstpage_image] =>[orig_patent_app_number] => 09241089 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/241089
Quadrature amplitude modulation signal demodulation circuit having improved interference detection circuit Jan 31, 1999 Issued
Array ( [id] => 1425183 [patent_doc_number] => 06529564 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-03-04 [patent_title] => 'Data pulse receiver' [patent_app_type] => B1 [patent_app_number] => 09/238893 [patent_app_country] => US [patent_app_date] => 1999-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 8742 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/529/06529564.pdf [firstpage_image] =>[orig_patent_app_number] => 09238893 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/238893
Data pulse receiver Jan 27, 1999 Issued
Array ( [id] => 1483388 [patent_doc_number] => 06452990 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-17 [patent_title] => 'Synchronous detection of wide bi-phase coded servo information for disk drive' [patent_app_type] => B1 [patent_app_number] => 09/239036 [patent_app_country] => US [patent_app_date] => 1999-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 25 [patent_no_of_words] => 8554 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/452/06452990.pdf [firstpage_image] =>[orig_patent_app_number] => 09239036 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/239036
Synchronous detection of wide bi-phase coded servo information for disk drive Jan 26, 1999 Issued
Array ( [id] => 1547515 [patent_doc_number] => 06373911 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-16 [patent_title] => 'Bit synchronization circuit' [patent_app_type] => B1 [patent_app_number] => 09/239090 [patent_app_country] => US [patent_app_date] => 1999-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 16 [patent_no_of_words] => 4663 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/373/06373911.pdf [firstpage_image] =>[orig_patent_app_number] => 09239090 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/239090
Bit synchronization circuit Jan 26, 1999 Issued
Array ( [id] => 7635390 [patent_doc_number] => 06381272 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-30 [patent_title] => 'Multi-channel adaptive filtering' [patent_app_type] => B1 [patent_app_number] => 09/235891 [patent_app_country] => US [patent_app_date] => 1999-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 24 [patent_no_of_words] => 9789 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 28 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/381/06381272.pdf [firstpage_image] =>[orig_patent_app_number] => 09235891 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/235891
Multi-channel adaptive filtering Jan 21, 1999 Issued
Array ( [id] => 1570746 [patent_doc_number] => 06377620 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-23 [patent_title] => 'Balancing amplitude and phase' [patent_app_type] => B1 [patent_app_number] => 09/233791 [patent_app_country] => US [patent_app_date] => 1999-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 2183 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/377/06377620.pdf [firstpage_image] =>[orig_patent_app_number] => 09233791 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/233791
Balancing amplitude and phase Jan 18, 1999 Issued
Array ( [id] => 7624371 [patent_doc_number] => 06724806 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-04-20 [patent_title] => 'Variable rate transmission and reception methods, and variable rate transmission and reception devices' [patent_app_type] => B2 [patent_app_number] => 09/230190 [patent_app_country] => US [patent_app_date] => 1999-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 8049 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 6 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/724/06724806.pdf [firstpage_image] =>[orig_patent_app_number] => 09230190 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/230190
Variable rate transmission and reception methods, and variable rate transmission and reception devices Jan 14, 1999 Issued
Array ( [id] => 7618979 [patent_doc_number] => 06944210 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-09-13 [patent_title] => 'Method for receiving or sending messages' [patent_app_type] => utility [patent_app_number] => 09/787988 [patent_app_country] => US [patent_app_date] => 1999-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2642 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/944/06944210.pdf [firstpage_image] =>[orig_patent_app_number] => 09787988 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/787988
Method for receiving or sending messages Jan 14, 1999 Issued
Array ( [id] => 1479134 [patent_doc_number] => 06389091 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-14 [patent_title] => 'Digital phase locked loop capable of suppressing jitter' [patent_app_type] => B1 [patent_app_number] => 09/229742 [patent_app_country] => US [patent_app_date] => 1999-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 21 [patent_no_of_words] => 5847 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/389/06389091.pdf [firstpage_image] =>[orig_patent_app_number] => 09229742 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/229742
Digital phase locked loop capable of suppressing jitter Jan 13, 1999 Issued
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