Search

Thomas M. Heckler

Examiner (ID: 12260)

Most Active Art Unit
2307
Art Unit(s)
2307, 2182, 2787, 2306, 2316, 2305, 2115, 2185, 2899
Total Applications
1597
Issued Applications
1476
Pending Applications
29
Abandoned Applications
92

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7638578 [patent_doc_number] => 06397343 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-28 [patent_title] => 'Method and system for dynamic clock frequency adjustment for a graphics subsystem in a computer' [patent_app_type] => B1 [patent_app_number] => 09/273247 [patent_app_country] => US [patent_app_date] => 1999-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 7363 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 22 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/397/06397343.pdf [firstpage_image] =>[orig_patent_app_number] => 09273247 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/273247
Method and system for dynamic clock frequency adjustment for a graphics subsystem in a computer Mar 18, 1999 Issued
Array ( [id] => 4207049 [patent_doc_number] => 06131168 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-10 [patent_title] => 'System and method for reducing phase error in clocks produced by a delay locked loop' [patent_app_type] => 1 [patent_app_number] => 9/271551 [patent_app_country] => US [patent_app_date] => 1999-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4356 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/131/06131168.pdf [firstpage_image] =>[orig_patent_app_number] => 271551 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/271551
System and method for reducing phase error in clocks produced by a delay locked loop Mar 17, 1999 Issued
Array ( [id] => 1572516 [patent_doc_number] => 06378078 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-23 [patent_title] => 'Semiconductor integrated circuit supervising an illicit address operation' [patent_app_type] => B1 [patent_app_number] => 09/271364 [patent_app_country] => US [patent_app_date] => 1999-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 22 [patent_no_of_words] => 2667 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/378/06378078.pdf [firstpage_image] =>[orig_patent_app_number] => 09271364 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/271364
Semiconductor integrated circuit supervising an illicit address operation Mar 17, 1999 Issued
Array ( [id] => 1553819 [patent_doc_number] => 06347372 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-02-12 [patent_title] => 'Multiprocessor control system, and a boot device and a boot control device used therein' [patent_app_type] => B1 [patent_app_number] => 09/271332 [patent_app_country] => US [patent_app_date] => 1999-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 42 [patent_figures_cnt] => 47 [patent_no_of_words] => 13299 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/347/06347372.pdf [firstpage_image] =>[orig_patent_app_number] => 09271332 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/271332
Multiprocessor control system, and a boot device and a boot control device used therein Mar 17, 1999 Issued
Array ( [id] => 7644109 [patent_doc_number] => 06473865 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-10-29 [patent_title] => 'Apparatus comprising clock control circuit, method of controlling clock signal and device using internal clock signal synchronized to external clock signal' [patent_app_type] => B1 [patent_app_number] => 09/272171 [patent_app_country] => US [patent_app_date] => 1999-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 45 [patent_figures_cnt] => 58 [patent_no_of_words] => 22188 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 6 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/473/06473865.pdf [firstpage_image] =>[orig_patent_app_number] => 09272171 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/272171
Apparatus comprising clock control circuit, method of controlling clock signal and device using internal clock signal synchronized to external clock signal Mar 17, 1999 Issued
Array ( [id] => 1549666 [patent_doc_number] => 06374352 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-16 [patent_title] => 'Temporary configuration with fall-back' [patent_app_type] => B1 [patent_app_number] => 09/271803 [patent_app_country] => US [patent_app_date] => 1999-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3640 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/374/06374352.pdf [firstpage_image] =>[orig_patent_app_number] => 09271803 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/271803
Temporary configuration with fall-back Mar 17, 1999 Issued
Array ( [id] => 1443995 [patent_doc_number] => 06336190 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-01-01 [patent_title] => 'Storage apparatus' [patent_app_type] => B1 [patent_app_number] => 09/268715 [patent_app_country] => US [patent_app_date] => 1999-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 5653 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/336/06336190.pdf [firstpage_image] =>[orig_patent_app_number] => 09268715 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/268715
Storage apparatus Mar 16, 1999 Issued
Array ( [id] => 1553626 [patent_doc_number] => 06347325 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-02-12 [patent_title] => 'Direct-digital synthesizers' [patent_app_type] => B1 [patent_app_number] => 09/268830 [patent_app_country] => US [patent_app_date] => 1999-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 16 [patent_no_of_words] => 4792 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/347/06347325.pdf [firstpage_image] =>[orig_patent_app_number] => 09268830 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/268830
Direct-digital synthesizers Mar 15, 1999 Issued
Array ( [id] => 1434065 [patent_doc_number] => 06341355 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-01-22 [patent_title] => 'Automatic clock switcher' [patent_app_type] => B1 [patent_app_number] => 09/270586 [patent_app_country] => US [patent_app_date] => 1999-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 7187 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/341/06341355.pdf [firstpage_image] =>[orig_patent_app_number] => 09270586 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/270586
Automatic clock switcher Mar 15, 1999 Issued
Array ( [id] => 1557620 [patent_doc_number] => 06401198 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-04 [patent_title] => 'STORING SYSTEM-LEVEL MASS STORAGE CONFIGURATION DATA IN NON-VOLATILE MEMORY ON EACH MASS STORAGE DEVICE TO ALLOW FOR REBOOT/POWER-ON RECONFIGURATION OF ALL INSTALLED MASS STORAGE DEVICES TO THE SAME CONFIGURATION AS LAST USE' [patent_app_type] => B1 [patent_app_number] => 09/265017 [patent_app_country] => US [patent_app_date] => 1999-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 17 [patent_no_of_words] => 11196 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/401/06401198.pdf [firstpage_image] =>[orig_patent_app_number] => 09265017 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/265017
STORING SYSTEM-LEVEL MASS STORAGE CONFIGURATION DATA IN NON-VOLATILE MEMORY ON EACH MASS STORAGE DEVICE TO ALLOW FOR REBOOT/POWER-ON RECONFIGURATION OF ALL INSTALLED MASS STORAGE DEVICES TO THE SAME CONFIGURATION AS LAST USE Mar 8, 1999 Issued
Array ( [id] => 1443996 [patent_doc_number] => 06336191 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-01-01 [patent_title] => 'Method and system for clock compensation in instruction level tracing in a symmetrical multi-processing system' [patent_app_type] => B1 [patent_app_number] => 09/264646 [patent_app_country] => US [patent_app_date] => 1999-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 3880 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/336/06336191.pdf [firstpage_image] =>[orig_patent_app_number] => 09264646 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/264646
Method and system for clock compensation in instruction level tracing in a symmetrical multi-processing system Mar 7, 1999 Issued
Array ( [id] => 1553851 [patent_doc_number] => 06347380 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-02-12 [patent_title] => 'System for adjusting clock rate to avoid audio data overflow and underrun' [patent_app_type] => B1 [patent_app_number] => 09/261414 [patent_app_country] => US [patent_app_date] => 1999-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 6113 [patent_no_of_claims] => 47 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/347/06347380.pdf [firstpage_image] =>[orig_patent_app_number] => 09261414 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/261414
System for adjusting clock rate to avoid audio data overflow and underrun Mar 2, 1999 Issued
Array ( [id] => 1549675 [patent_doc_number] => 06374353 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-16 [patent_title] => 'Information processing apparatus method of booting information processing apparatus at a high speed' [patent_app_type] => B1 [patent_app_number] => 09/261255 [patent_app_country] => US [patent_app_date] => 1999-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 40 [patent_no_of_words] => 17657 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/374/06374353.pdf [firstpage_image] =>[orig_patent_app_number] => 09261255 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/261255
Information processing apparatus method of booting information processing apparatus at a high speed Mar 2, 1999 Issued
Array ( [id] => 1353341 [patent_doc_number] => RE038104 [patent_country] => US [patent_kind] => E1 [patent_issue_date] => 2003-04-29 [patent_title] => 'Method and apparatus for resolving data references in generated code' [patent_app_type] => E1 [patent_app_number] => 09/261970 [patent_app_country] => US [patent_app_date] => 1999-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 2631 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 20 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/RE/038/RE038104.pdf [firstpage_image] =>[orig_patent_app_number] => 09261970 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/261970
Method and apparatus for resolving data references in generated code Mar 2, 1999 Issued
Array ( [id] => 4239927 [patent_doc_number] => 06088829 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-11 [patent_title] => 'Synchronous data transfer system' [patent_app_type] => 1 [patent_app_number] => 9/261177 [patent_app_country] => US [patent_app_date] => 1999-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 28 [patent_no_of_words] => 21377 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/088/06088829.pdf [firstpage_image] =>[orig_patent_app_number] => 261177 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/261177
Synchronous data transfer system Mar 2, 1999 Issued
Array ( [id] => 4423623 [patent_doc_number] => 06311281 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-30 [patent_title] => 'Apparatus and method for changing processor clock ratio settings' [patent_app_type] => 1 [patent_app_number] => 9/261058 [patent_app_country] => US [patent_app_date] => 1999-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1996 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/311/06311281.pdf [firstpage_image] =>[orig_patent_app_number] => 261058 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/261058
Apparatus and method for changing processor clock ratio settings Mar 1, 1999 Issued
Array ( [id] => 1490171 [patent_doc_number] => 06367007 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-02 [patent_title] => 'Using system configuration data to customize bios during the boot-up process' [patent_app_type] => B1 [patent_app_number] => 09/255029 [patent_app_country] => US [patent_app_date] => 1999-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2698 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/367/06367007.pdf [firstpage_image] =>[orig_patent_app_number] => 09255029 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/255029
Using system configuration data to customize bios during the boot-up process Feb 21, 1999 Issued
Array ( [id] => 4290928 [patent_doc_number] => 06308285 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-23 [patent_title] => 'Warm processor swap in a multiprocessor personal computer system' [patent_app_type] => 1 [patent_app_number] => 9/251830 [patent_app_country] => US [patent_app_date] => 1999-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3637 [patent_no_of_claims] => 48 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/308/06308285.pdf [firstpage_image] =>[orig_patent_app_number] => 251830 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/251830
Warm processor swap in a multiprocessor personal computer system Feb 16, 1999 Issued
Array ( [id] => 1444001 [patent_doc_number] => 06336192 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-01-01 [patent_title] => 'Parallel redundancy encoding apparatus' [patent_app_type] => B1 [patent_app_number] => 09/249488 [patent_app_country] => US [patent_app_date] => 1999-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 23 [patent_no_of_words] => 15095 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/336/06336192.pdf [firstpage_image] =>[orig_patent_app_number] => 09249488 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/249488
Parallel redundancy encoding apparatus Feb 11, 1999 Issued
Array ( [id] => 1567519 [patent_doc_number] => 06438685 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-20 [patent_title] => 'Method for installing a hard drive into a computer and improved components therefor' [patent_app_type] => B1 [patent_app_number] => 09/243318 [patent_app_country] => US [patent_app_date] => 1999-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 39 [patent_no_of_words] => 17543 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/438/06438685.pdf [firstpage_image] =>[orig_patent_app_number] => 09243318 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/243318
Method for installing a hard drive into a computer and improved components therefor Feb 1, 1999 Issued
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