Search

Thomas M. Heckler

Examiner (ID: 12260)

Most Active Art Unit
2307
Art Unit(s)
2307, 2182, 2787, 2306, 2316, 2305, 2115, 2185, 2899
Total Applications
1597
Issued Applications
1476
Pending Applications
29
Abandoned Applications
92

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4101378 [patent_doc_number] => 06163852 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-19 [patent_title] => 'Apparatus for receiving data from a synchronous random access memory' [patent_app_type] => 1 [patent_app_number] => 9/206454 [patent_app_country] => US [patent_app_date] => 1998-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3283 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/163/06163852.pdf [firstpage_image] =>[orig_patent_app_number] => 206454 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/206454
Apparatus for receiving data from a synchronous random access memory Dec 6, 1998 Issued
Array ( [id] => 4203794 [patent_doc_number] => 06161178 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-12 [patent_title] => 'Data processing system and method for specification of one of a plurality of password requirements for each boot device' [patent_app_type] => 1 [patent_app_number] => 9/206686 [patent_app_country] => US [patent_app_date] => 1998-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3172 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/161/06161178.pdf [firstpage_image] =>[orig_patent_app_number] => 206686 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/206686
Data processing system and method for specification of one of a plurality of password requirements for each boot device Dec 6, 1998 Issued
Array ( [id] => 4177121 [patent_doc_number] => 06158014 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-05 [patent_title] => 'Automatic detection of 8B/10B data rates' [patent_app_type] => 1 [patent_app_number] => 9/204669 [patent_app_country] => US [patent_app_date] => 1998-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3561 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/158/06158014.pdf [firstpage_image] =>[orig_patent_app_number] => 204669 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/204669
Automatic detection of 8B/10B data rates Dec 1, 1998 Issued
Array ( [id] => 4326022 [patent_doc_number] => 06253327 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-26 [patent_title] => 'Single step network logon based on point to point protocol' [patent_app_type] => 1 [patent_app_number] => 9/204640 [patent_app_country] => US [patent_app_date] => 1998-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 4432 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/253/06253327.pdf [firstpage_image] =>[orig_patent_app_number] => 204640 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/204640
Single step network logon based on point to point protocol Dec 1, 1998 Issued
Array ( [id] => 4097348 [patent_doc_number] => 06163586 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-19 [patent_title] => 'Autobaud/autoecho method' [patent_app_type] => 1 [patent_app_number] => 9/204029 [patent_app_country] => US [patent_app_date] => 1998-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4498 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 236 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/163/06163586.pdf [firstpage_image] =>[orig_patent_app_number] => 204029 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/204029
Autobaud/autoecho method Nov 30, 1998 Issued
Array ( [id] => 1456835 [patent_doc_number] => 06457123 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-24 [patent_title] => 'Self-importing system change routine' [patent_app_type] => B1 [patent_app_number] => 09/201536 [patent_app_country] => US [patent_app_date] => 1998-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2049 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/457/06457123.pdf [firstpage_image] =>[orig_patent_app_number] => 09201536 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/201536
Self-importing system change routine Nov 29, 1998 Issued
Array ( [id] => 1490174 [patent_doc_number] => 06367008 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-02 [patent_title] => 'Self-importing system change routine' [patent_app_type] => B1 [patent_app_number] => 09/201407 [patent_app_country] => US [patent_app_date] => 1998-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2048 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/367/06367008.pdf [firstpage_image] =>[orig_patent_app_number] => 09201407 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/201407
Self-importing system change routine Nov 29, 1998 Issued
Array ( [id] => 4281182 [patent_doc_number] => 06260140 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-10 [patent_title] => 'Operating system multi boot integrator' [patent_app_type] => 1 [patent_app_number] => 9/201911 [patent_app_country] => US [patent_app_date] => 1998-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4329 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/260/06260140.pdf [firstpage_image] =>[orig_patent_app_number] => 201911 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/201911
Operating system multi boot integrator Nov 29, 1998 Issued
Array ( [id] => 4422448 [patent_doc_number] => 06233681 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-15 [patent_title] => 'Computer system and a control method of the same for in-system reprogramming of a fixed flash ROM when access to the fixed flash ROM is not possible' [patent_app_type] => 1 [patent_app_number] => 9/198407 [patent_app_country] => US [patent_app_date] => 1998-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 4994 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/233/06233681.pdf [firstpage_image] =>[orig_patent_app_number] => 198407 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/198407
Computer system and a control method of the same for in-system reprogramming of a fixed flash ROM when access to the fixed flash ROM is not possible Nov 23, 1998 Issued
Array ( [id] => 4318503 [patent_doc_number] => 06182233 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-30 [patent_title] => 'Interlocked pipelined CMOS' [patent_app_type] => 1 [patent_app_number] => 9/196985 [patent_app_country] => US [patent_app_date] => 1998-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 46 [patent_figures_cnt] => 50 [patent_no_of_words] => 10146 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/182/06182233.pdf [firstpage_image] =>[orig_patent_app_number] => 196985 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/196985
Interlocked pipelined CMOS Nov 19, 1998 Issued
Array ( [id] => 1466419 [patent_doc_number] => 06393574 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-21 [patent_title] => 'Method and an apparatus for reproducing bitstream having non-sequential system clock data seamlessly therebetween' [patent_app_type] => B1 [patent_app_number] => 09/195998 [patent_app_country] => US [patent_app_date] => 1998-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 67 [patent_figures_cnt] => 93 [patent_no_of_words] => 44570 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/393/06393574.pdf [firstpage_image] =>[orig_patent_app_number] => 09195998 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/195998
Method and an apparatus for reproducing bitstream having non-sequential system clock data seamlessly therebetween Nov 19, 1998 Issued
Array ( [id] => 4422969 [patent_doc_number] => 06272647 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-07 [patent_title] => 'Fault tolerant clock voter with recovery' [patent_app_type] => 1 [patent_app_number] => 9/196950 [patent_app_country] => US [patent_app_date] => 1998-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 7027 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/272/06272647.pdf [firstpage_image] =>[orig_patent_app_number] => 196950 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/196950
Fault tolerant clock voter with recovery Nov 19, 1998 Issued
Array ( [id] => 4421757 [patent_doc_number] => 06272539 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-07 [patent_title] => 'Methods, systems and computer program products for determining and visually representing a user\'s overall network delay in collaborative applications' [patent_app_type] => 1 [patent_app_number] => 9/193957 [patent_app_country] => US [patent_app_date] => 1998-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 8280 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/272/06272539.pdf [firstpage_image] =>[orig_patent_app_number] => 193957 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/193957
Methods, systems and computer program products for determining and visually representing a user's overall network delay in collaborative applications Nov 17, 1998 Issued
Array ( [id] => 1521778 [patent_doc_number] => 06502189 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-31 [patent_title] => 'Method and dedicated frame buffer for loop initialization and responses' [patent_app_type] => B1 [patent_app_number] => 09/193387 [patent_app_country] => US [patent_app_date] => 1998-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 19895 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/502/06502189.pdf [firstpage_image] =>[orig_patent_app_number] => 09193387 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/193387
Method and dedicated frame buffer for loop initialization and responses Nov 16, 1998 Issued
Array ( [id] => 4101348 [patent_doc_number] => 06163850 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-19 [patent_title] => 'Method of selecting between multiple clock drive sources for a backplane clock signal' [patent_app_type] => 1 [patent_app_number] => 9/193745 [patent_app_country] => US [patent_app_date] => 1998-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2100 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/163/06163850.pdf [firstpage_image] =>[orig_patent_app_number] => 193745 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/193745
Method of selecting between multiple clock drive sources for a backplane clock signal Nov 16, 1998 Issued
09/191264 OBJECT-ORIENTED BOOTING FRAMEWORK Nov 11, 1998 Abandoned
Array ( [id] => 4350183 [patent_doc_number] => 06321338 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-20 [patent_title] => 'Network surveillance' [patent_app_type] => 1 [patent_app_number] => 9/188739 [patent_app_country] => US [patent_app_date] => 1998-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 7528 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/321/06321338.pdf [firstpage_image] =>[orig_patent_app_number] => 188739 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/188739
Network surveillance Nov 8, 1998 Issued
Array ( [id] => 4392406 [patent_doc_number] => 06289468 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-11 [patent_title] => 'Technique for controlling system bus timing with on-chip programmable delay lines' [patent_app_type] => 1 [patent_app_number] => 9/187383 [patent_app_country] => US [patent_app_date] => 1998-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 1922 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/289/06289468.pdf [firstpage_image] =>[orig_patent_app_number] => 187383 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/187383
Technique for controlling system bus timing with on-chip programmable delay lines Nov 5, 1998 Issued
Array ( [id] => 1519731 [patent_doc_number] => 06421785 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-16 [patent_title] => 'Clock selection for processing audio data' [patent_app_type] => B1 [patent_app_number] => 09/185247 [patent_app_country] => US [patent_app_date] => 1998-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 3112 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/421/06421785.pdf [firstpage_image] =>[orig_patent_app_number] => 09185247 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/185247
Clock selection for processing audio data Nov 2, 1998 Issued
Array ( [id] => 4148181 [patent_doc_number] => 06128749 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-03 [patent_title] => 'Cross-clock domain data transfer method and apparatus' [patent_app_type] => 1 [patent_app_number] => 9/186046 [patent_app_country] => US [patent_app_date] => 1998-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 11518 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/128/06128749.pdf [firstpage_image] =>[orig_patent_app_number] => 186046 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/186046
Cross-clock domain data transfer method and apparatus Nov 2, 1998 Issued
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