Search

Thomas M. Heckler

Examiner (ID: 12260)

Most Active Art Unit
2307
Art Unit(s)
2307, 2182, 2787, 2306, 2316, 2305, 2115, 2185, 2899
Total Applications
1597
Issued Applications
1476
Pending Applications
29
Abandoned Applications
92

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4427333 [patent_doc_number] => 06226756 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-01 [patent_title] => 'Apparatus and method for providing a common system interface for processors' [patent_app_type] => 1 [patent_app_number] => 9/185126 [patent_app_country] => US [patent_app_date] => 1998-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5794 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/226/06226756.pdf [firstpage_image] =>[orig_patent_app_number] => 185126 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/185126
Apparatus and method for providing a common system interface for processors Nov 2, 1998 Issued
Array ( [id] => 4124481 [patent_doc_number] => 06101612 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-08 [patent_title] => 'Apparatus for aligning clock and data signals received from a RAM' [patent_app_type] => 1 [patent_app_number] => 9/183627 [patent_app_country] => US [patent_app_date] => 1998-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 4182 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/101/06101612.pdf [firstpage_image] =>[orig_patent_app_number] => 183627 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/183627
Apparatus for aligning clock and data signals received from a RAM Oct 29, 1998 Issued
Array ( [id] => 4178379 [patent_doc_number] => 06108795 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-22 [patent_title] => 'Method for aligning clock and data signals received from a RAM' [patent_app_type] => 1 [patent_app_number] => 9/183781 [patent_app_country] => US [patent_app_date] => 1998-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 4136 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/108/06108795.pdf [firstpage_image] =>[orig_patent_app_number] => 183781 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/183781
Method for aligning clock and data signals received from a RAM Oct 29, 1998 Issued
Array ( [id] => 4312546 [patent_doc_number] => 06237090 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-22 [patent_title] => 'Synchronous or asynchronous resetting circuit' [patent_app_type] => 1 [patent_app_number] => 9/173055 [patent_app_country] => US [patent_app_date] => 1998-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4004 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/237/06237090.pdf [firstpage_image] =>[orig_patent_app_number] => 173055 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/173055
Synchronous or asynchronous resetting circuit Oct 14, 1998 Issued
Array ( [id] => 4375030 [patent_doc_number] => 06170064 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-02 [patent_title] => 'Computer and a method for displaying the time of using system' [patent_app_type] => 1 [patent_app_number] => 9/170049 [patent_app_country] => US [patent_app_date] => 1998-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 5211 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/170/06170064.pdf [firstpage_image] =>[orig_patent_app_number] => 170049 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/170049
Computer and a method for displaying the time of using system Oct 12, 1998 Issued
Array ( [id] => 4427334 [patent_doc_number] => 06226757 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-01 [patent_title] => 'Apparatus and method for bus timing compensation' [patent_app_type] => 1 [patent_app_number] => 9/169245 [patent_app_country] => US [patent_app_date] => 1998-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 46 [patent_no_of_words] => 9883 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/226/06226757.pdf [firstpage_image] =>[orig_patent_app_number] => 169245 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/169245
Apparatus and method for bus timing compensation Oct 8, 1998 Issued
Array ( [id] => 4133515 [patent_doc_number] => 06047382 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-04 [patent_title] => 'Processor with short set-up and hold times for bus signals' [patent_app_type] => 1 [patent_app_number] => 9/168354 [patent_app_country] => US [patent_app_date] => 1998-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4136 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/047/06047382.pdf [firstpage_image] =>[orig_patent_app_number] => 168354 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/168354
Processor with short set-up and hold times for bus signals Oct 6, 1998 Issued
Array ( [id] => 4269735 [patent_doc_number] => 06223228 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-24 [patent_title] => 'Apparatus for synchronizing multiple processors in a data processing system' [patent_app_type] => 1 [patent_app_number] => 9/156377 [patent_app_country] => US [patent_app_date] => 1998-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 16 [patent_no_of_words] => 10243 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/223/06223228.pdf [firstpage_image] =>[orig_patent_app_number] => 156377 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/156377
Apparatus for synchronizing multiple processors in a data processing system Sep 16, 1998 Issued
Array ( [id] => 4423636 [patent_doc_number] => 06311283 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-30 [patent_title] => 'Need based synchronization of computer system time clock to reduce loading on network server' [patent_app_type] => 1 [patent_app_number] => 9/156555 [patent_app_country] => US [patent_app_date] => 1998-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 5645 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/311/06311283.pdf [firstpage_image] =>[orig_patent_app_number] => 156555 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/156555
Need based synchronization of computer system time clock to reduce loading on network server Sep 16, 1998 Issued
Array ( [id] => 4167684 [patent_doc_number] => 06065127 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-16 [patent_title] => 'Multi-mode buffer for digital signal processor' [patent_app_type] => 1 [patent_app_number] => 9/152441 [patent_app_country] => US [patent_app_date] => 1998-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 4685 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/065/06065127.pdf [firstpage_image] =>[orig_patent_app_number] => 152441 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/152441
Multi-mode buffer for digital signal processor Sep 13, 1998 Issued
Array ( [id] => 4226091 [patent_doc_number] => 06029250 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-22 [patent_title] => 'Method and apparatus for adaptively adjusting the timing offset between a clock signal and digital signals transmitted coincident with that clock signal, and memory device and system using same' [patent_app_type] => 1 [patent_app_number] => 9/150079 [patent_app_country] => US [patent_app_date] => 1998-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 12986 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/029/06029250.pdf [firstpage_image] =>[orig_patent_app_number] => 150079 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/150079
Method and apparatus for adaptively adjusting the timing offset between a clock signal and digital signals transmitted coincident with that clock signal, and memory device and system using same Sep 8, 1998 Issued
Array ( [id] => 4318566 [patent_doc_number] => 06182237 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-30 [patent_title] => 'System and method for detecting phase errors in asics with multiple clock frequencies' [patent_app_type] => 1 [patent_app_number] => 9/144758 [patent_app_country] => US [patent_app_date] => 1998-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 3414 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/182/06182237.pdf [firstpage_image] =>[orig_patent_app_number] => 144758 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/144758
System and method for detecting phase errors in asics with multiple clock frequencies Aug 30, 1998 Issued
Array ( [id] => 4269438 [patent_doc_number] => 06138234 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-24 [patent_title] => 'Node booting method in high-speed parallel computer' [patent_app_type] => 1 [patent_app_number] => 9/139726 [patent_app_country] => US [patent_app_date] => 1998-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3270 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/138/06138234.pdf [firstpage_image] =>[orig_patent_app_number] => 139726 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/139726
Node booting method in high-speed parallel computer Aug 30, 1998 Issued
Array ( [id] => 4337405 [patent_doc_number] => 06249864 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-19 [patent_title] => 'Removable medium processing apparatus and recording and reproducing apparatus' [patent_app_type] => 1 [patent_app_number] => 9/139518 [patent_app_country] => US [patent_app_date] => 1998-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 18 [patent_no_of_words] => 9371 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/249/06249864.pdf [firstpage_image] =>[orig_patent_app_number] => 139518 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/139518
Removable medium processing apparatus and recording and reproducing apparatus Aug 24, 1998 Issued
Array ( [id] => 4332387 [patent_doc_number] => 06243617 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-05 [patent_title] => 'System and method for incorporation of post-production operations to a web output from an image transfer device' [patent_app_type] => 1 [patent_app_number] => 9/135281 [patent_app_country] => US [patent_app_date] => 1998-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 3660 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 242 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/243/06243617.pdf [firstpage_image] =>[orig_patent_app_number] => 135281 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/135281
System and method for incorporation of post-production operations to a web output from an image transfer device Aug 16, 1998 Issued
Array ( [id] => 4209231 [patent_doc_number] => 06154836 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-28 [patent_title] => 'Method and system for configuring plug and play devices for a computer operating system' [patent_app_type] => 1 [patent_app_number] => 9/135119 [patent_app_country] => US [patent_app_date] => 1998-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5225 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/154/06154836.pdf [firstpage_image] =>[orig_patent_app_number] => 135119 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/135119
Method and system for configuring plug and play devices for a computer operating system Aug 16, 1998 Issued
Array ( [id] => 4260703 [patent_doc_number] => 06092211 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-18 [patent_title] => 'Integrated circuit for supplying a clock signal and method for constructing the same' [patent_app_type] => 1 [patent_app_number] => 9/134576 [patent_app_country] => US [patent_app_date] => 1998-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 9550 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/092/06092211.pdf [firstpage_image] =>[orig_patent_app_number] => 134576 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/134576
Integrated circuit for supplying a clock signal and method for constructing the same Aug 13, 1998 Issued
Array ( [id] => 4346763 [patent_doc_number] => 06330668 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-12-11 [patent_title] => 'Integrated circuit having hardware circuitry to prevent electrical or thermal stressing of the silicon circuitry' [patent_app_type] => 1 [patent_app_number] => 9/133946 [patent_app_country] => US [patent_app_date] => 1998-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4977 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/330/06330668.pdf [firstpage_image] =>[orig_patent_app_number] => 133946 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/133946
Integrated circuit having hardware circuitry to prevent electrical or thermal stressing of the silicon circuitry Aug 13, 1998 Issued
Array ( [id] => 4176957 [patent_doc_number] => 06158002 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-05 [patent_title] => 'Method and apparatus of boot device switching by a floppy disk' [patent_app_type] => 1 [patent_app_number] => 9/134760 [patent_app_country] => US [patent_app_date] => 1998-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 5219 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/158/06158002.pdf [firstpage_image] =>[orig_patent_app_number] => 134760 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/134760
Method and apparatus of boot device switching by a floppy disk Aug 13, 1998 Issued
Array ( [id] => 4116511 [patent_doc_number] => 06067629 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-23 [patent_title] => 'Apparatus and method for pseudo-synchronous communication between clocks of different frequencies' [patent_app_type] => 1 [patent_app_number] => 9/131963 [patent_app_country] => US [patent_app_date] => 1998-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4062 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/067/06067629.pdf [firstpage_image] =>[orig_patent_app_number] => 131963 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/131963
Apparatus and method for pseudo-synchronous communication between clocks of different frequencies Aug 9, 1998 Issued
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