Search

Thomas M. Heckler

Examiner (ID: 12260)

Most Active Art Unit
2307
Art Unit(s)
2307, 2182, 2787, 2306, 2316, 2305, 2115, 2185, 2899
Total Applications
1597
Issued Applications
1476
Pending Applications
29
Abandoned Applications
92

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4025438 [patent_doc_number] => 06006327 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-21 [patent_title] => 'Option setting device and method for providing various settings through software means to a computer motherboard' [patent_app_type] => 1 [patent_app_number] => 9/131569 [patent_app_country] => US [patent_app_date] => 1998-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3757 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/006/06006327.pdf [firstpage_image] =>[orig_patent_app_number] => 131569 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/131569
Option setting device and method for providing various settings through software means to a computer motherboard Aug 9, 1998 Issued
Array ( [id] => 4236836 [patent_doc_number] => 06041418 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-21 [patent_title] => 'Race free and technology independent flag generating circuitry associated with two asynchronous clocks' [patent_app_type] => 1 [patent_app_number] => 9/131373 [patent_app_country] => US [patent_app_date] => 1998-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 5941 [patent_no_of_claims] => 62 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/041/06041418.pdf [firstpage_image] =>[orig_patent_app_number] => 131373 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/131373
Race free and technology independent flag generating circuitry associated with two asynchronous clocks Aug 6, 1998 Issued
Array ( [id] => 4374408 [patent_doc_number] => 06175918 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-16 [patent_title] => 'Client computer, initialization processing method applied to client computer, and computer program product used in client computer' [patent_app_type] => 1 [patent_app_number] => 9/128940 [patent_app_country] => US [patent_app_date] => 1998-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 22 [patent_no_of_words] => 6146 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 14 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/175/06175918.pdf [firstpage_image] =>[orig_patent_app_number] => 128940 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/128940
Client computer, initialization processing method applied to client computer, and computer program product used in client computer Aug 4, 1998 Issued
Array ( [id] => 4139248 [patent_doc_number] => 06073244 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-06 [patent_title] => 'Power-saving clock control apparatus and method' [patent_app_type] => 1 [patent_app_number] => 9/128969 [patent_app_country] => US [patent_app_date] => 1998-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 15 [patent_no_of_words] => 9253 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/073/06073244.pdf [firstpage_image] =>[orig_patent_app_number] => 128969 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/128969
Power-saving clock control apparatus and method Aug 3, 1998 Issued
Array ( [id] => 4239369 [patent_doc_number] => 06088794 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-11 [patent_title] => 'Computer system capable of selective booting from two hard disk drives' [patent_app_type] => 1 [patent_app_number] => 9/127037 [patent_app_country] => US [patent_app_date] => 1998-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7302 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/088/06088794.pdf [firstpage_image] =>[orig_patent_app_number] => 127037 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/127037
Computer system capable of selective booting from two hard disk drives Jul 30, 1998 Issued
Array ( [id] => 4381856 [patent_doc_number] => 06256746 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-03 [patent_title] => 'System and method for multi-input wake up in a microcontroller using a single clock' [patent_app_type] => 1 [patent_app_number] => 9/127700 [patent_app_country] => US [patent_app_date] => 1998-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5619 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/256/06256746.pdf [firstpage_image] =>[orig_patent_app_number] => 127700 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/127700
System and method for multi-input wake up in a microcontroller using a single clock Jul 30, 1998 Issued
Array ( [id] => 4314640 [patent_doc_number] => 06181978 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-30 [patent_title] => 'System and method for generating a smooth blending fillet surface' [patent_app_type] => 1 [patent_app_number] => 9/127247 [patent_app_country] => US [patent_app_date] => 1998-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 4976 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 225 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/181/06181978.pdf [firstpage_image] =>[orig_patent_app_number] => 127247 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/127247
System and method for generating a smooth blending fillet surface Jul 30, 1998 Issued
Array ( [id] => 4200519 [patent_doc_number] => 06021506 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-01 [patent_title] => 'Method and apparatus for stopping a bus clock while there are no activities on a bus' [patent_app_type] => 1 [patent_app_number] => 9/127575 [patent_app_country] => US [patent_app_date] => 1998-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4097 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/021/06021506.pdf [firstpage_image] =>[orig_patent_app_number] => 127575 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/127575
Method and apparatus for stopping a bus clock while there are no activities on a bus Jul 30, 1998 Issued
Array ( [id] => 4237712 [patent_doc_number] => 06112308 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-29 [patent_title] => 'Cascaded multiple internal phase-locked loops for synchronization of hierarchically distinct chipset components and subsystems' [patent_app_type] => 1 [patent_app_number] => 9/126937 [patent_app_country] => US [patent_app_date] => 1998-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5037 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/112/06112308.pdf [firstpage_image] =>[orig_patent_app_number] => 126937 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/126937
Cascaded multiple internal phase-locked loops for synchronization of hierarchically distinct chipset components and subsystems Jul 29, 1998 Issued
Array ( [id] => 4127195 [patent_doc_number] => 06058486 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-02 [patent_title] => 'Timing generator for plural reference clock frequencies' [patent_app_type] => 1 [patent_app_number] => 9/121976 [patent_app_country] => US [patent_app_date] => 1998-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 87 [patent_no_of_words] => 11589 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 265 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/058/06058486.pdf [firstpage_image] =>[orig_patent_app_number] => 121976 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/121976
Timing generator for plural reference clock frequencies Jul 23, 1998 Issued
Array ( [id] => 4209241 [patent_doc_number] => 06154837 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-28 [patent_title] => 'Microcomputer enabling an erase/write program of a flash memory to interrupt by transferring interrupt vectors from a boot ROM to a RAM' [patent_app_type] => 1 [patent_app_number] => 9/119577 [patent_app_country] => US [patent_app_date] => 1998-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 12 [patent_no_of_words] => 4398 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/154/06154837.pdf [firstpage_image] =>[orig_patent_app_number] => 119577 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/119577
Microcomputer enabling an erase/write program of a flash memory to interrupt by transferring interrupt vectors from a boot ROM to a RAM Jul 20, 1998 Issued
Array ( [id] => 4239630 [patent_doc_number] => 06088812 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-11 [patent_title] => 'Sequential data transfer method' [patent_app_type] => 1 [patent_app_number] => 9/119763 [patent_app_country] => US [patent_app_date] => 1998-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4763 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/088/06088812.pdf [firstpage_image] =>[orig_patent_app_number] => 119763 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/119763
Sequential data transfer method Jul 20, 1998 Issued
Array ( [id] => 4270605 [patent_doc_number] => 06223283 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-24 [patent_title] => 'Method and apparatus for identifying display monitor functionality and compatibility' [patent_app_type] => 1 [patent_app_number] => 9/118386 [patent_app_country] => US [patent_app_date] => 1998-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 4475 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/223/06223283.pdf [firstpage_image] =>[orig_patent_app_number] => 118386 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/118386
Method and apparatus for identifying display monitor functionality and compatibility Jul 16, 1998 Issued
Array ( [id] => 4420206 [patent_doc_number] => 06272401 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-07 [patent_title] => 'Valve positioner system' [patent_app_type] => 1 [patent_app_number] => 9/118406 [patent_app_country] => US [patent_app_date] => 1998-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 35 [patent_no_of_words] => 18176 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/272/06272401.pdf [firstpage_image] =>[orig_patent_app_number] => 118406 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/118406
Valve positioner system Jul 16, 1998 Issued
Array ( [id] => 4116550 [patent_doc_number] => 06067632 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-23 [patent_title] => 'Clock-synchronized memory device and the scheduler thereof' [patent_app_type] => 1 [patent_app_number] => 9/116249 [patent_app_country] => US [patent_app_date] => 1998-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 10 [patent_no_of_words] => 8506 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/067/06067632.pdf [firstpage_image] =>[orig_patent_app_number] => 116249 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/116249
Clock-synchronized memory device and the scheduler thereof Jul 15, 1998 Issued
Array ( [id] => 4121711 [patent_doc_number] => 06023771 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-08 [patent_title] => 'Clock redundancy system' [patent_app_type] => 1 [patent_app_number] => 9/113521 [patent_app_country] => US [patent_app_date] => 1998-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 9815 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/023/06023771.pdf [firstpage_image] =>[orig_patent_app_number] => 113521 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/113521
Clock redundancy system Jul 9, 1998 Issued
Array ( [id] => 4122495 [patent_doc_number] => 06052794 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-18 [patent_title] => 'Upgradeable microprocessor and motherboard' [patent_app_type] => 1 [patent_app_number] => 9/111815 [patent_app_country] => US [patent_app_date] => 1998-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3641 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/052/06052794.pdf [firstpage_image] =>[orig_patent_app_number] => 111815 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/111815
Upgradeable microprocessor and motherboard Jul 7, 1998 Issued
Array ( [id] => 4161076 [patent_doc_number] => 06061802 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-09 [patent_title] => 'Software based clock synchronization' [patent_app_type] => 1 [patent_app_number] => 9/109835 [patent_app_country] => US [patent_app_date] => 1998-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5059 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/061/06061802.pdf [firstpage_image] =>[orig_patent_app_number] => 109835 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/109835
Software based clock synchronization Jul 1, 1998 Issued
Array ( [id] => 4195356 [patent_doc_number] => 06085319 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-04 [patent_title] => 'Microcomputer reset apparatus and method' [patent_app_type] => 1 [patent_app_number] => 9/108311 [patent_app_country] => US [patent_app_date] => 1998-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 3277 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/085/06085319.pdf [firstpage_image] =>[orig_patent_app_number] => 108311 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/108311
Microcomputer reset apparatus and method Jun 30, 1998 Issued
Array ( [id] => 4271759 [patent_doc_number] => 06208949 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-27 [patent_title] => 'Method and apparatus for dynamical system analysis' [patent_app_type] => 1 [patent_app_number] => 9/108253 [patent_app_country] => US [patent_app_date] => 1998-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 9966 [patent_no_of_claims] => 45 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/208/06208949.pdf [firstpage_image] =>[orig_patent_app_number] => 108253 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/108253
Method and apparatus for dynamical system analysis Jun 30, 1998 Issued
Menu