Thomas M Sember
Examiner (ID: 1518, Phone: (571)272-2381 , Office: P/2875 )
Most Active Art Unit | 2875 |
Art Unit(s) | 2875, 2885, 3406, 3621, 2215 |
Total Applications | 2896 |
Issued Applications | 2391 |
Pending Applications | 127 |
Abandoned Applications | 377 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
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[id] => 5401821
[patent_doc_number] => 20090237134
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[patent_kind] => A1
[patent_issue_date] => 2009-09-24
[patent_title] => 'MINIMIZING CLOCK UNCERTAINTY ON CLOCK DISTRIBUTION NETWORKS USING A MULTI-LEVEL DE-SKEWING TECHNIQUE'
[patent_app_type] => utility
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/051834 | Minimizing clock uncertainty on clock distribution networks using a multi-level de-skewing technique | Mar 18, 2008 | Issued |
Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/051001 | Structure for system for extending the useful life of another system | Mar 18, 2008 | Issued |
Array
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[patent_doc_number] => 20090240964
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[patent_issue_date] => 2009-09-24
[patent_title] => 'Method and apparatus for holistic power management to dynamically and automatically turn servers, network equipment and facility components on and off inside and across multiple data centers based on a variety of parameters without violating existing service levels'
[patent_app_type] => utility
[patent_app_number] => 12/051833
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Array
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[patent_issue_date] => 2011-10-04
[patent_title] => 'Clock distribution apparatus, systems, and methods'
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Array
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[patent_title] => 'Timing control in a specialized processing block'
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Array
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[patent_title] => 'Method and apparatus for the generation and control of clock signals'
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Array
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[patent_title] => 'Context state management for processor feature sets'
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[patent_app_number] => 11/967303
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/967303 | Context state management for processor feature sets | Dec 30, 2007 | Issued |
Array
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[id] => 5432794
[patent_doc_number] => 20090167380
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[patent_title] => 'System and method for reducing EME emissions in digital desynchronized circuits'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/003468 | System and method for reducing EME emissions in digital desynchronized circuits | Dec 25, 2007 | Abandoned |
Array
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[id] => 4881078
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[patent_title] => 'Apparatus, system and method for allowing prescribed components in the system to be started with minimal delay'
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Array
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[id] => 4700225
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[patent_title] => 'Memory access system and memory access method thereof'
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Array
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[id] => 4869032
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Array
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[id] => 5548200
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Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/933851 | METHOD AND SYSTEM FOR PARTITIONING A DEVICE INTO DOMAINS TO OPTIMIZE POWER CONSUMPTION | Oct 31, 2007 | Abandoned |