Search

Thomas N. Moulis

Examiner (ID: 16587, Phone: (571)272-4852 , Office: P/3747 )

Most Active Art Unit
3747
Art Unit(s)
3402, 3747
Total Applications
2821
Issued Applications
2594
Pending Applications
48
Abandoned Applications
186

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11352478 [patent_doc_number] => 20160371218 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-22 [patent_title] => 'OPERATING SYSTEM CARD FOR MULTIPLE DEVICES' [patent_app_type] => utility [patent_app_number] => 14/746361 [patent_app_country] => US [patent_app_date] => 2015-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 14489 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14746361 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/746361
Operating system card for multiple devices Jun 21, 2015 Issued
Array ( [id] => 11745763 [patent_doc_number] => 20170199836 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-07-13 [patent_title] => 'MANUFACTURING METHODS' [patent_app_type] => utility [patent_app_number] => 15/314764 [patent_app_country] => US [patent_app_date] => 2015-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 9784 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15314764 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/314764
Manufacturing methods for printed circuit boards May 25, 2015 Issued
Array ( [id] => 12173921 [patent_doc_number] => 09892065 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-02-13 [patent_title] => 'Adjustments of buffer credits for optimizing the number of retry operations and transfer ready operations' [patent_app_type] => utility [patent_app_number] => 14/717716 [patent_app_country] => US [patent_app_date] => 2015-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 17044 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14717716 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/717716
Adjustments of buffer credits for optimizing the number of retry operations and transfer ready operations May 19, 2015 Issued
Array ( [id] => 11292617 [patent_doc_number] => 20160342549 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-11-24 [patent_title] => 'RECEIVING BUFFER CREDITS BY A PLURALITY OF CHANNELS OF ONE OR MORE HOST COMPUTATIONAL DEVICES FOR TRANSMITTING DATA TO A CONTROL UNIT' [patent_app_type] => utility [patent_app_number] => 14/717733 [patent_app_country] => US [patent_app_date] => 2015-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 16851 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14717733 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/717733
Receiving buffer credits by a plurality of channels of one or more host computational devices for transmitting data to a control unit May 19, 2015 Issued
Array ( [id] => 12475401 [patent_doc_number] => 09990385 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-06-05 [patent_title] => Method and system for collecting and analyzing time-series data [patent_app_type] => utility [patent_app_number] => 14/715453 [patent_app_country] => US [patent_app_date] => 2015-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 16075 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 292 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14715453 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/715453
Method and system for collecting and analyzing time-series data May 17, 2015 Issued
Array ( [id] => 11823919 [patent_doc_number] => 20170212856 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-07-27 [patent_title] => 'PERIPHERAL DEVICE SERVER ACCESS' [patent_app_type] => utility [patent_app_number] => 15/327724 [patent_app_country] => US [patent_app_date] => 2015-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4411 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15327724 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/327724
Peripheral device server access Apr 29, 2015 Issued
Array ( [id] => 11109653 [patent_doc_number] => 20160306623 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-20 [patent_title] => 'CONTROL MODULE OF NODE AND FIRMWARE UPDATING METHOD FOR THE CONTROL MODULE' [patent_app_type] => utility [patent_app_number] => 14/688165 [patent_app_country] => US [patent_app_date] => 2015-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3336 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14688165 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/688165
CONTROL MODULE OF NODE AND FIRMWARE UPDATING METHOD FOR THE CONTROL MODULE Apr 15, 2015 Abandoned
Array ( [id] => 12228969 [patent_doc_number] => 09916213 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-03-13 [patent_title] => 'Bus arbitration with routing and failover mechanism' [patent_app_type] => utility [patent_app_number] => 14/688209 [patent_app_country] => US [patent_app_date] => 2015-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 13001 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 272 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14688209 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/688209
Bus arbitration with routing and failover mechanism Apr 15, 2015 Issued
Array ( [id] => 12146702 [patent_doc_number] => 09880955 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-01-30 [patent_title] => 'Interface unit for direct memory access utilizing identifiers' [patent_app_type] => utility [patent_app_number] => 14/688427 [patent_app_country] => US [patent_app_date] => 2015-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2891 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14688427 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/688427
Interface unit for direct memory access utilizing identifiers Apr 15, 2015 Issued
Array ( [id] => 14203003 [patent_doc_number] => 10268618 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-23 [patent_title] => Chip level switching for multiple computing device interfaces [patent_app_type] => utility [patent_app_number] => 14/688350 [patent_app_country] => US [patent_app_date] => 2015-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 3516 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14688350 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/688350
Chip level switching for multiple computing device interfaces Apr 15, 2015 Issued
Array ( [id] => 10335329 [patent_doc_number] => 20150220334 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-06 [patent_title] => 'Single Code Set Applications Executing In A Multiple Platform System' [patent_app_type] => utility [patent_app_number] => 14/686328 [patent_app_country] => US [patent_app_date] => 2015-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5662 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14686328 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/686328
Single code set applications executing in a multiple platform system Apr 13, 2015 Issued
Array ( [id] => 10164228 [patent_doc_number] => 09195449 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-11-24 [patent_title] => 'Stream-based software application delivery and launching system' [patent_app_type] => utility [patent_app_number] => 14/684632 [patent_app_country] => US [patent_app_date] => 2015-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 7327 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14684632 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/684632
Stream-based software application delivery and launching system Apr 12, 2015 Issued
Array ( [id] => 10461778 [patent_doc_number] => 20150346793 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-03 [patent_title] => 'SELECTIVE ASSEMBLING TYPE COMPUTING DEVICE' [patent_app_type] => utility [patent_app_number] => 14/682616 [patent_app_country] => US [patent_app_date] => 2015-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 4137 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14682616 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/682616
SELECTIVE ASSEMBLING TYPE COMPUTING DEVICE Apr 8, 2015 Abandoned
Array ( [id] => 10276074 [patent_doc_number] => 20150161071 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-11 [patent_title] => 'SEMICONDUCTOR DEVICE AND DATA PROCESSING SYSTEM SELECTIVELY OPERATING AS ONE OF A BIG ENDIAN OR LITTLE ENDIAN SYSTEM' [patent_app_type] => utility [patent_app_number] => 14/628059 [patent_app_country] => US [patent_app_date] => 2015-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5994 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14628059 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/628059
Semiconductor device and data processing system selectively operating as one of a big endian or little endian system Feb 19, 2015 Issued
Array ( [id] => 13720855 [patent_doc_number] => 20170371382 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-12-28 [patent_title] => EXPANSION SLOT INTERFACE [patent_app_type] => utility [patent_app_number] => 15/543205 [patent_app_country] => US [patent_app_date] => 2015-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3613 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15543205 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/543205
Expansion slot interface Jan 29, 2015 Issued
Array ( [id] => 13948705 [patent_doc_number] => 10210128 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-02-19 [patent_title] => Redirection of lane resources [patent_app_type] => utility [patent_app_number] => 15/543185 [patent_app_country] => US [patent_app_date] => 2015-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3842 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15543185 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/543185
Redirection of lane resources Jan 27, 2015 Issued
Array ( [id] => 9998895 [patent_doc_number] => 09043512 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-05-26 [patent_title] => 'Method for combining non-latency-sensitive and latency-sensitive input and output' [patent_app_type] => utility [patent_app_number] => 14/591733 [patent_app_country] => US [patent_app_date] => 2015-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9406 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14591733 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/591733
Method for combining non-latency-sensitive and latency-sensitive input and output Jan 6, 2015 Issued
Array ( [id] => 10808606 [patent_doc_number] => 20160154764 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-02 [patent_title] => 'ELECTRONIC DEVICE AND ELECTRONIC DEVICE ASSEMBLY' [patent_app_type] => utility [patent_app_number] => 14/587398 [patent_app_country] => US [patent_app_date] => 2014-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1008 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14587398 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/587398
ELECTRONIC DEVICE AND ELECTRONIC DEVICE ASSEMBLY Dec 30, 2014 Abandoned
Array ( [id] => 10808605 [patent_doc_number] => 20160154763 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-02 [patent_title] => 'ELECTRONIC DEVICE AND ELECTRONIC DEVICE ASSEMBLY' [patent_app_type] => utility [patent_app_number] => 14/587382 [patent_app_country] => US [patent_app_date] => 2014-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1048 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14587382 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/587382
ELECTRONIC DEVICE AND ELECTRONIC DEVICE ASSEMBLY Dec 30, 2014 Abandoned
Array ( [id] => 10275864 [patent_doc_number] => 20150160861 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-11 [patent_title] => 'SYSTEM AND METHOD FOR DIVIDING AND SYNCHRONIZING A PROCESSING TASK ACROSS MULTIPLE PROCESSING ELEMENTS/PROCESSORS IN HARDWARE' [patent_app_type] => utility [patent_app_number] => 14/585003 [patent_app_country] => US [patent_app_date] => 2014-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5999 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14585003 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/585003
System and method for dividing and synchronizing a processing task across multiple processing elements/processors in hardware Dec 28, 2014 Issued
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