
Thomas Noland
Examiner (ID: 5797)
| Most Active Art Unit | 2856 |
| Art Unit(s) | 2856, 2858, 2212, 2899, 2605 |
| Total Applications | 2707 |
| Issued Applications | 2417 |
| Pending Applications | 95 |
| Abandoned Applications | 197 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 20000532
[patent_doc_number] => 20250138754
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-05-01
[patent_title] => MEMORY SYSTEM
[patent_app_type] => utility
[patent_app_number] => 19/007686
[patent_app_country] => US
[patent_app_date] => 2025-01-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9670
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 144
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19007686
[rel_patent_id] =>[rel_patent_doc_number] =>) 19/007686 | MEMORY SYSTEM | Jan 1, 2025 | Pending |
Array
(
[id] => 20152209
[patent_doc_number] => 20250252047
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-08-07
[patent_title] => WEAR LEVELING METHOD, SOLID-STATE DRIVE AND STORAGE MEDIUM
[patent_app_type] => utility
[patent_app_number] => 19/003767
[patent_app_country] => US
[patent_app_date] => 2024-12-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2410
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -12
[patent_words_short_claim] => 117
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19003767
[rel_patent_id] =>[rel_patent_doc_number] =>) 19/003767 | WEAR LEVELING METHOD, SOLID-STATE DRIVE AND STORAGE MEDIUM | Dec 26, 2024 | Pending |
Array
(
[id] => 20181043
[patent_doc_number] => 20250265001
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-08-21
[patent_title] => COMPUTING DEVICE AND METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 19/000849
[patent_app_country] => US
[patent_app_date] => 2024-12-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3313
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 170
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19000849
[rel_patent_id] =>[rel_patent_doc_number] =>) 19/000849 | COMPUTING DEVICE AND METHOD THEREOF | Dec 23, 2024 | Pending |
Array
(
[id] => 20137853
[patent_doc_number] => 20250244897
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-07-31
[patent_title] => PREMATURE INCOMING PACKET PROCESSING
[patent_app_type] => utility
[patent_app_number] => 18/973159
[patent_app_country] => US
[patent_app_date] => 2024-12-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5859
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 108
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18973159
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/973159 | PREMATURE INCOMING PACKET PROCESSING | Dec 8, 2024 | Pending |
Array
(
[id] => 19787210
[patent_doc_number] => 20250060889
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-02-20
[patent_title] => SHARING NODE STORAGE RESOURCES WITH THE ENTIRE CLUSTER
[patent_app_type] => utility
[patent_app_number] => 18/935262
[patent_app_country] => US
[patent_app_date] => 2024-11-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6738
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 51
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18935262
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/935262 | SHARING NODE STORAGE RESOURCES WITH THE ENTIRE CLUSTER | Oct 31, 2024 | Pending |
Array
(
[id] => 19864459
[patent_doc_number] => 20250103245
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-03-27
[patent_title] => ADDRESS VERIFICATION AT A MEMORY SYSTEM
[patent_app_type] => utility
[patent_app_number] => 18/912322
[patent_app_country] => US
[patent_app_date] => 2024-10-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11945
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18912322
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/912322 | ADDRESS VERIFICATION AT A MEMORY SYSTEM | Oct 9, 2024 | Pending |
Array
(
[id] => 19725881
[patent_doc_number] => 20250028632
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-01-23
[patent_title] => GLOBAL VIRTUAL ADDRESS SPACE ACROSS OPERATING SYSTEM DOMAIN
[patent_app_type] => utility
[patent_app_number] => 18/908087
[patent_app_country] => US
[patent_app_date] => 2024-10-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11324
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 198
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18908087
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/908087 | GLOBAL VIRTUAL ADDRESS SPACE ACROSS OPERATING SYSTEM DOMAIN | Oct 6, 2024 | Pending |
Array
(
[id] => 19711082
[patent_doc_number] => 20250021224
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-01-16
[patent_title] => MEMORY SYSTEM, HOST DEVICE AND INFORMATION PROCESSING SYSTEM FOR ERROR CORRECTION PROCESSING
[patent_app_type] => utility
[patent_app_number] => 18/895604
[patent_app_country] => US
[patent_app_date] => 2024-09-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10567
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => 0
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18895604
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/895604 | MEMORY SYSTEM, HOST DEVICE AND INFORMATION PROCESSING SYSTEM FOR ERROR CORRECTION PROCESSING | Sep 24, 2024 | Pending |
Array
(
[id] => 19514155
[patent_doc_number] => 20240345841
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-10-17
[patent_title] => SYSTEM, APPARATUS AND METHOD FOR FINE-GRAIN ADDRESS SPACE SELECTION IN A PROCESSOR
[patent_app_type] => utility
[patent_app_number] => 18/751604
[patent_app_country] => US
[patent_app_date] => 2024-06-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10267
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => 0
[patent_words_short_claim] => 121
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18751604
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/751604 | SYSTEM, APPARATUS AND METHOD FOR FINE-GRAIN ADDRESS SPACE SELECTION IN A PROCESSOR | Jun 23, 2024 | Pending |
Array
(
[id] => 19590882
[patent_doc_number] => 20240388439
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-11-21
[patent_title] => System and Method for High Performance Secure Access to a Trusted Platform Module on a Hardware Virtualization Platform
[patent_app_type] => utility
[patent_app_number] => 18/750817
[patent_app_country] => US
[patent_app_date] => 2024-06-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7893
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -12
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18750817
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/750817 | System and Method for High Performance Secure Access to a Trusted Platform Module on a Hardware Virtualization Platform | Jun 20, 2024 | Pending |
Array
(
[id] => 19283943
[patent_doc_number] => 20240220419
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-07-04
[patent_title] => LOGIC MODULE FOR USE WITH ENCODED INSTRUCTIONS
[patent_app_type] => utility
[patent_app_number] => 18/603960
[patent_app_country] => US
[patent_app_date] => 2024-03-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9832
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 89
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18603960
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/603960 | LOGIC MODULE FOR USE WITH ENCODED INSTRUCTIONS | Mar 12, 2024 | Pending |
Array
(
[id] => 19334184
[patent_doc_number] => 20240248614
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-07-25
[patent_title] => MEMORY, OPERATION METHOD OF MEMORY, AND OPERATION METHOD OF MEMORY SYSTEM
[patent_app_type] => utility
[patent_app_number] => 18/585054
[patent_app_country] => US
[patent_app_date] => 2024-02-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6508
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -5
[patent_words_short_claim] => 51
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18585054
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/585054 | MEMORY, OPERATION METHOD OF MEMORY, AND OPERATION METHOD OF MEMORY SYSTEM | Feb 22, 2024 | Pending |
Array
(
[id] => 19694822
[patent_doc_number] => 20250013367
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-01-09
[patent_title] => Performance Optimization for Storing Data in Memory Services Configured on Storage Capacity of a Data Storage Device
[patent_app_type] => utility
[patent_app_number] => 18/439623
[patent_app_country] => US
[patent_app_date] => 2024-02-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 19105
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 110
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18439623
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/439623 | Performance Optimization for Storing Data in Memory Services Configured on Storage Capacity of a Data Storage Device | Feb 11, 2024 | Pending |
Array
(
[id] => 19625960
[patent_doc_number] => 12164793
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2024-12-10
[patent_title] => Premature incoming packet processing
[patent_app_type] => utility
[patent_app_number] => 18/426508
[patent_app_country] => US
[patent_app_date] => 2024-01-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 10789
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 165
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18426508
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/426508 | Premature incoming packet processing | Jan 29, 2024 | Issued |
Array
(
[id] => 19159565
[patent_doc_number] => 20240152272
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-05-09
[patent_title] => ELECTRONIC APPARATUS AND CONTROL METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 18/417395
[patent_app_country] => US
[patent_app_date] => 2024-01-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10111
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -13
[patent_words_short_claim] => 195
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18417395
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/417395 | Electronic apparatus and control method thereof | Jan 18, 2024 | Issued |
Array
(
[id] => 20623861
[patent_doc_number] => 12591368
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2026-03-31
[patent_title] => Virtualized-in-hardware Input Output Memory Management
[patent_app_type] => utility
[patent_app_number] => 18/409141
[patent_app_country] => US
[patent_app_date] => 2024-01-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 7939
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 149
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18409141
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/409141 | VIRTUALIZED-IN-HARDWARE INPUT OUTPUT MEMORY MANAGEMENT | Jan 9, 2024 | Pending |
Array
(
[id] => 19099597
[patent_doc_number] => 20240118825
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-04-11
[patent_title] => MASTER SLAVE MANAGED MEMORY STORAGE
[patent_app_type] => utility
[patent_app_number] => 18/491685
[patent_app_country] => US
[patent_app_date] => 2023-10-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7968
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 35
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18491685
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/491685 | MASTER SLAVE MANAGED MEMORY STORAGE | Oct 19, 2023 | Pending |
Array
(
[id] => 18904518
[patent_doc_number] => 20240020003
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-01-18
[patent_title] => HARDWARE ACCESSIBLE MEMORY FABRIC
[patent_app_type] => utility
[patent_app_number] => 18/476724
[patent_app_country] => US
[patent_app_date] => 2023-09-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 35845
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 144
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18476724
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/476724 | HARDWARE ACCESSIBLE MEMORY FABRIC | Sep 27, 2023 | Pending |
Array
(
[id] => 19811366
[patent_doc_number] => 12242760
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-03-04
[patent_title] => Storage traffic pattern detection in memory devices
[patent_app_type] => utility
[patent_app_number] => 18/456016
[patent_app_country] => US
[patent_app_date] => 2023-08-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 8
[patent_no_of_words] => 11355
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 132
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18456016
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/456016 | Storage traffic pattern detection in memory devices | Aug 24, 2023 | Issued |
Array
(
[id] => 19219764
[patent_doc_number] => 20240184468
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-06-06
[patent_title] => HYBRID TRIPLE LEVEL CELL PROGRAMMING ALGORITHM FOR ON PITCH SCALING IN BIT COST SCALABLE MEMORY APPARATUSES AND SUB-BLOCK MODE
[patent_app_type] => utility
[patent_app_number] => 18/224477
[patent_app_country] => US
[patent_app_date] => 2023-07-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 16485
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 102
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18224477
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/224477 | HYBRID TRIPLE LEVEL CELL PROGRAMMING ALGORITHM FOR ON PITCH SCALING IN BIT COST SCALABLE MEMORY APPARATUSES AND SUB-BLOCK MODE | Jul 19, 2023 | Pending |