Search

Thomas Noland

Examiner (ID: 237)

Most Active Art Unit
2856
Art Unit(s)
2856, 2605, 2212, 2858, 2899
Total Applications
2707
Issued Applications
2417
Pending Applications
95
Abandoned Applications
197

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6833244 [patent_doc_number] => 20030160789 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-08-28 [patent_title] => 'Multiple scan line sample filtering' [patent_app_type] => new [patent_app_number] => 10/085636 [patent_app_country] => US [patent_app_date] => 2002-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 31 [patent_no_of_words] => 13897 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0160/20030160789.pdf [firstpage_image] =>[orig_patent_app_number] => 10085636 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/085636
Multiple scan line sample filtering Feb 27, 2002 Issued
10/017354 Deterministic triggering over an ethernet network statement regarding federally sponsored research Dec 13, 2001 Abandoned
Array ( [id] => 1071033 [patent_doc_number] => 06845475 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-01-18 [patent_title] => 'Method and apparatus for error detection' [patent_app_type] => utility [patent_app_number] => 09/768880 [patent_app_country] => US [patent_app_date] => 2001-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4964 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 30 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/845/06845475.pdf [firstpage_image] =>[orig_patent_app_number] => 09768880 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/768880
Method and apparatus for error detection Jan 22, 2001 Issued
Array ( [id] => 4326202 [patent_doc_number] => 06249128 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-19 [patent_title] => 'Automated microwave test system with improved accuracy' [patent_app_type] => 1 [patent_app_number] => 8/955782 [patent_app_country] => US [patent_app_date] => 1997-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4782 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/249/06249128.pdf [firstpage_image] =>[orig_patent_app_number] => 955782 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/955782
Automated microwave test system with improved accuracy Oct 21, 1997 Issued
Array ( [id] => 4121908 [patent_doc_number] => 06023783 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-08 [patent_title] => 'Hybrid concatenated codes and iterative decoding' [patent_app_type] => 1 [patent_app_number] => 8/857021 [patent_app_country] => US [patent_app_date] => 1997-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 41 [patent_no_of_words] => 14002 [patent_no_of_claims] => 74 [patent_no_of_ind_claims] => 20 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/023/06023783.pdf [firstpage_image] =>[orig_patent_app_number] => 857021 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/857021
Hybrid concatenated codes and iterative decoding May 14, 1997 Issued
Array ( [id] => 4087624 [patent_doc_number] => 06048090 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-11 [patent_title] => 'Error correction and concurrent verification of a product code' [patent_app_type] => 1 [patent_app_number] => 8/842146 [patent_app_country] => US [patent_app_date] => 1997-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 21 [patent_no_of_words] => 13372 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/048/06048090.pdf [firstpage_image] =>[orig_patent_app_number] => 842146 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/842146
Error correction and concurrent verification of a product code Apr 22, 1997 Issued
Array ( [id] => 4085833 [patent_doc_number] => 06009539 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-28 [patent_title] => 'Cross-triggering CPUs for enhanced test operations in a multi-CPU computer system' [patent_app_type] => 1 [patent_app_number] => 8/756594 [patent_app_country] => US [patent_app_date] => 1996-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 48 [patent_no_of_words] => 17759 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/009/06009539.pdf [firstpage_image] =>[orig_patent_app_number] => 756594 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/756594
Cross-triggering CPUs for enhanced test operations in a multi-CPU computer system Nov 26, 1996 Issued
Array ( [id] => 3891130 [patent_doc_number] => 05729553 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-03-17 [patent_title] => 'Semiconductor integrated circuit with a testable block' [patent_app_type] => 1 [patent_app_number] => 8/684066 [patent_app_country] => US [patent_app_date] => 1996-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6542 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/729/05729553.pdf [firstpage_image] =>[orig_patent_app_number] => 684066 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/684066
Semiconductor integrated circuit with a testable block Jul 18, 1996 Issued
Array ( [id] => 3965448 [patent_doc_number] => 05956480 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-21 [patent_title] => 'Terminal and online system for tracking version of data and program' [patent_app_type] => 1 [patent_app_number] => 8/292033 [patent_app_country] => US [patent_app_date] => 1994-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 19 [patent_no_of_words] => 6914 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/956/05956480.pdf [firstpage_image] =>[orig_patent_app_number] => 292033 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/292033
Terminal and online system for tracking version of data and program Aug 17, 1994 Issued
Array ( [id] => 4170299 [patent_doc_number] => 06019501 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-01 [patent_title] => 'Address generating device for memory tester' [patent_app_type] => 1 [patent_app_number] => 7/860017 [patent_app_country] => US [patent_app_date] => 1992-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4708 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 432 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/019/06019501.pdf [firstpage_image] =>[orig_patent_app_number] => 860017 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/860017
Address generating device for memory tester Mar 29, 1992 Issued
Array ( [id] => 2983289 [patent_doc_number] => 05182715 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-01-26 [patent_title] => 'Rapid and accurate production of stereolighographic parts' [patent_app_type] => 1 [patent_app_number] => 7/824819 [patent_app_country] => US [patent_app_date] => 1992-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 44 [patent_figures_cnt] => 66 [patent_no_of_words] => 29017 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/182/05182715.pdf [firstpage_image] =>[orig_patent_app_number] => 824819 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/824819
Rapid and accurate production of stereolighographic parts Jan 21, 1992 Issued
Array ( [id] => 2864580 [patent_doc_number] => 05127013 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-06-30 [patent_title] => 'Data communication system' [patent_app_type] => 1 [patent_app_number] => 7/817967 [patent_app_country] => US [patent_app_date] => 1992-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 15343 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/127/05127013.pdf [firstpage_image] =>[orig_patent_app_number] => 817967 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/817967
Data communication system Jan 7, 1992 Issued
Array ( [id] => 2841464 [patent_doc_number] => 05128945 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-07-07 [patent_title] => 'Packet framing using cyclic redundancy checking' [patent_app_type] => 1 [patent_app_number] => 7/786016 [patent_app_country] => US [patent_app_date] => 1991-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 2948 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/128/05128945.pdf [firstpage_image] =>[orig_patent_app_number] => 786016 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/786016
Packet framing using cyclic redundancy checking Oct 30, 1991 Issued
07/742168 DATA COMMUNICATION SYSTEM Jul 31, 1991 Abandoned
Array ( [id] => 2786567 [patent_doc_number] => 05132975 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-07-21 [patent_title] => 'Very high speed error detection network' [patent_app_type] => 1 [patent_app_number] => 7/734045 [patent_app_country] => US [patent_app_date] => 1991-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 6863 [patent_no_of_claims] => 52 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 21 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/132/05132975.pdf [firstpage_image] =>[orig_patent_app_number] => 734045 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/734045
Very high speed error detection network Jul 21, 1991 Issued
Array ( [id] => 2864448 [patent_doc_number] => 05127006 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-06-30 [patent_title] => 'Fault diagnostic system' [patent_app_type] => 1 [patent_app_number] => 7/729901 [patent_app_country] => US [patent_app_date] => 1991-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 14 [patent_no_of_words] => 9980 [patent_no_of_claims] => 48 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/127/05127006.pdf [firstpage_image] =>[orig_patent_app_number] => 729901 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/729901
Fault diagnostic system Jul 14, 1991 Issued
07/719659 TESTING BUFFER/REGISTER Jun 23, 1991 Abandoned
Array ( [id] => 2814810 [patent_doc_number] => 05146459 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-09-08 [patent_title] => 'Electronic equipment with check-sum function' [patent_app_type] => 1 [patent_app_number] => 7/715703 [patent_app_country] => US [patent_app_date] => 1991-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 1511 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/146/05146459.pdf [firstpage_image] =>[orig_patent_app_number] => 715703 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/715703
Electronic equipment with check-sum function Jun 16, 1991 Issued
Array ( [id] => 2831228 [patent_doc_number] => 05173904 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-12-22 [patent_title] => 'Logic circuits systems, and methods having individually testable logic modules' [patent_app_type] => 1 [patent_app_number] => 7/717170 [patent_app_country] => US [patent_app_date] => 1991-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 11708 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/173/05173904.pdf [firstpage_image] =>[orig_patent_app_number] => 717170 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/717170
Logic circuits systems, and methods having individually testable logic modules Jun 16, 1991 Issued
Array ( [id] => 2854895 [patent_doc_number] => 05138620 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-08-11 [patent_title] => 'Communication control system' [patent_app_type] => 1 [patent_app_number] => 7/712257 [patent_app_country] => US [patent_app_date] => 1991-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 4317 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/138/05138620.pdf [firstpage_image] =>[orig_patent_app_number] => 712257 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/712257
Communication control system Jun 6, 1991 Issued
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