Search

Thomas Noland

Examiner (ID: 237)

Most Active Art Unit
2856
Art Unit(s)
2856, 2605, 2212, 2858, 2899
Total Applications
2707
Issued Applications
2417
Pending Applications
95
Abandoned Applications
197

Applications

Application numberTitle of the applicationFiling DateStatus
07/708099 DIGITAL BUS MONITOR INTEGRATED CIRCUITS May 23, 1991 Abandoned
Array ( [id] => 2773827 [patent_doc_number] => 05063565 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-11-05 [patent_title] => 'Single-error detecting and correcting system' [patent_app_type] => 1 [patent_app_number] => 7/688718 [patent_app_country] => US [patent_app_date] => 1991-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 1945 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/063/05063565.pdf [firstpage_image] =>[orig_patent_app_number] => 688718 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/688718
Single-error detecting and correcting system Apr 22, 1991 Issued
Array ( [id] => 2859253 [patent_doc_number] => 05111460 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-05-05 [patent_title] => 'Process for the localization of defective stations in local networks and associated interface controller' [patent_app_type] => 1 [patent_app_number] => 7/687999 [patent_app_country] => US [patent_app_date] => 1991-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 4003 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/111/05111460.pdf [firstpage_image] =>[orig_patent_app_number] => 687999 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/687999
Process for the localization of defective stations in local networks and associated interface controller Apr 18, 1991 Issued
07/639738 LOGIC CIRCUIT HAVING INDIVIDUALLY TESTABLE LOGIC MODULES Jan 10, 1991 Abandoned
Array ( [id] => 2744722 [patent_doc_number] => 05051997 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-09-24 [patent_title] => 'Semiconductor integrated circuit with self-test function' [patent_app_type] => 1 [patent_app_number] => 7/622316 [patent_app_country] => US [patent_app_date] => 1990-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2153 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 230 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/051/05051997.pdf [firstpage_image] =>[orig_patent_app_number] => 622316 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/622316
Semiconductor integrated circuit with self-test function Dec 2, 1990 Issued
Array ( [id] => 2865511 [patent_doc_number] => 05113400 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-05-12 [patent_title] => 'Error detection system' [patent_app_type] => 1 [patent_app_number] => 7/616517 [patent_app_country] => US [patent_app_date] => 1990-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 5640 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/113/05113400.pdf [firstpage_image] =>[orig_patent_app_number] => 616517 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/616517
Error detection system Nov 20, 1990 Issued
Array ( [id] => 2848134 [patent_doc_number] => 05121393 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-06-09 [patent_title] => 'System for testing a microprocessor' [patent_app_type] => 1 [patent_app_number] => 7/606107 [patent_app_country] => US [patent_app_date] => 1990-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3163 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 309 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/121/05121393.pdf [firstpage_image] =>[orig_patent_app_number] => 606107 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/606107
System for testing a microprocessor Oct 30, 1990 Issued
Array ( [id] => 2786088 [patent_doc_number] => 05151904 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-09-29 [patent_title] => 'Reconfigurable, multi-user Viterbi decoder' [patent_app_type] => 1 [patent_app_number] => 7/590238 [patent_app_country] => US [patent_app_date] => 1990-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 9 [patent_no_of_words] => 4739 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/151/05151904.pdf [firstpage_image] =>[orig_patent_app_number] => 590238 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/590238
Reconfigurable, multi-user Viterbi decoder Sep 26, 1990 Issued
Array ( [id] => 2817722 [patent_doc_number] => 05157663 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-10-20 [patent_title] => 'Fault tolerant computer system' [patent_app_type] => 1 [patent_app_number] => 7/586807 [patent_app_country] => US [patent_app_date] => 1990-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 8073 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/157/05157663.pdf [firstpage_image] =>[orig_patent_app_number] => 586807 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/586807
Fault tolerant computer system Sep 23, 1990 Issued
Array ( [id] => 2795929 [patent_doc_number] => 05142536 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-08-25 [patent_title] => 'Data processor' [patent_app_type] => 1 [patent_app_number] => 7/584608 [patent_app_country] => US [patent_app_date] => 1990-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3585 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 317 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/142/05142536.pdf [firstpage_image] =>[orig_patent_app_number] => 584608 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/584608
Data processor Sep 18, 1990 Issued
Array ( [id] => 2717589 [patent_doc_number] => 05014276 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-05-07 [patent_title] => 'Convolutional encoder and sequential decoder with parallel architecture and block coding properties' [patent_app_type] => 1 [patent_app_number] => 7/572461 [patent_app_country] => US [patent_app_date] => 1990-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4389 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/014/05014276.pdf [firstpage_image] =>[orig_patent_app_number] => 572461 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/572461
Convolutional encoder and sequential decoder with parallel architecture and block coding properties Aug 26, 1990 Issued
Array ( [id] => 2848452 [patent_doc_number] => 05161159 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-11-03 [patent_title] => 'Semiconductor memory with multiple clocking for test mode entry' [patent_app_type] => 1 [patent_app_number] => 7/568968 [patent_app_country] => US [patent_app_date] => 1990-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 23626 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 26 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/161/05161159.pdf [firstpage_image] =>[orig_patent_app_number] => 568968 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/568968
Semiconductor memory with multiple clocking for test mode entry Aug 16, 1990 Issued
Array ( [id] => 2824831 [patent_doc_number] => 05123021 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-06-16 [patent_title] => 'Message routing check system' [patent_app_type] => 1 [patent_app_number] => 7/568039 [patent_app_country] => US [patent_app_date] => 1990-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1338 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/123/05123021.pdf [firstpage_image] =>[orig_patent_app_number] => 568039 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/568039
Message routing check system Aug 15, 1990 Issued
Array ( [id] => 2881203 [patent_doc_number] => 05163053 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-11-10 [patent_title] => 'Audio signal demodulation circuit' [patent_app_type] => 1 [patent_app_number] => 7/499349 [patent_app_country] => US [patent_app_date] => 1990-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 1788 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 294 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/163/05163053.pdf [firstpage_image] =>[orig_patent_app_number] => 499349 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/499349
Audio signal demodulation circuit Aug 5, 1990 Issued
Array ( [id] => 2799569 [patent_doc_number] => 05155843 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-10-13 [patent_title] => 'Error transition mode for multi-processor system' [patent_app_type] => 1 [patent_app_number] => 7/547597 [patent_app_country] => US [patent_app_date] => 1990-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 27 [patent_no_of_words] => 45083 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/155/05155843.pdf [firstpage_image] =>[orig_patent_app_number] => 547597 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/547597
Error transition mode for multi-processor system Jun 28, 1990 Issued
Array ( [id] => 2793879 [patent_doc_number] => 05164944 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-11-17 [patent_title] => 'Method and apparatus for effecting multiple error correction in a computer memory' [patent_app_type] => 1 [patent_app_number] => 7/535757 [patent_app_country] => US [patent_app_date] => 1990-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 7297 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/164/05164944.pdf [firstpage_image] =>[orig_patent_app_number] => 535757 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/535757
Method and apparatus for effecting multiple error correction in a computer memory Jun 7, 1990 Issued
Array ( [id] => 2760385 [patent_doc_number] => 05022031 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-06-04 [patent_title] => 'Semiconductor memory comprising an on-chip error correction device, and integrated circuit comprising such a semiconductor memory' [patent_app_type] => 1 [patent_app_number] => 7/526968 [patent_app_country] => US [patent_app_date] => 1990-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 5952 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 13 [patent_words_short_claim] => 21 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/022/05022031.pdf [firstpage_image] =>[orig_patent_app_number] => 526968 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/526968
Semiconductor memory comprising an on-chip error correction device, and integrated circuit comprising such a semiconductor memory May 21, 1990 Issued
07/526400 FAULT DIAGNOSTIC SYSTEM May 20, 1990 Abandoned
Array ( [id] => 2814274 [patent_doc_number] => 05124990 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-06-23 [patent_title] => 'Diagnostic hardware for serial datalink' [patent_app_type] => 1 [patent_app_number] => 7/520437 [patent_app_country] => US [patent_app_date] => 1990-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5980 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 267 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/124/05124990.pdf [firstpage_image] =>[orig_patent_app_number] => 520437 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/520437
Diagnostic hardware for serial datalink May 7, 1990 Issued
Array ( [id] => 2814430 [patent_doc_number] => 05115436 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-05-19 [patent_title] => 'Forward error correction code system' [patent_app_type] => 1 [patent_app_number] => 7/521114 [patent_app_country] => US [patent_app_date] => 1990-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 7270 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/115/05115436.pdf [firstpage_image] =>[orig_patent_app_number] => 521114 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/521114
Forward error correction code system May 3, 1990 Issued
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