Search

Thomas Noland

Examiner (ID: 237)

Most Active Art Unit
2856
Art Unit(s)
2856, 2605, 2212, 2858, 2899
Total Applications
2707
Issued Applications
2417
Pending Applications
95
Abandoned Applications
197

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 2882248 [patent_doc_number] => 05091910 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-02-25 [patent_title] => 'Information processing device' [patent_app_type] => 1 [patent_app_number] => 7/464387 [patent_app_country] => US [patent_app_date] => 1990-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3073 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/091/05091910.pdf [firstpage_image] =>[orig_patent_app_number] => 464387 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/464387
Information processing device Jan 11, 1990 Issued
Array ( [id] => 2699210 [patent_doc_number] => 05050168 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-09-17 [patent_title] => 'Test coverage analyzer' [patent_app_type] => 1 [patent_app_number] => 7/458789 [patent_app_country] => US [patent_app_date] => 1989-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 5484 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/050/05050168.pdf [firstpage_image] =>[orig_patent_app_number] => 458789 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/458789
Test coverage analyzer Dec 28, 1989 Issued
Array ( [id] => 2827356 [patent_doc_number] => 05081624 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-01-14 [patent_title] => 'Fault-tolerant serial attachment of remote high-speed I/O busses' [patent_app_type] => 1 [patent_app_number] => 7/458867 [patent_app_country] => US [patent_app_date] => 1989-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2919 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 321 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/081/05081624.pdf [firstpage_image] =>[orig_patent_app_number] => 458867 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/458867
Fault-tolerant serial attachment of remote high-speed I/O busses Dec 28, 1989 Issued
Array ( [id] => 2866143 [patent_doc_number] => 05084876 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-01-28 [patent_title] => 'Method and apparatus for testing digital circuits' [patent_app_type] => 1 [patent_app_number] => 7/457697 [patent_app_country] => US [patent_app_date] => 1989-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 7947 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 37 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/084/05084876.pdf [firstpage_image] =>[orig_patent_app_number] => 457697 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/457697
Method and apparatus for testing digital circuits Dec 28, 1989 Issued
Array ( [id] => 2798056 [patent_doc_number] => 05130993 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-07-14 [patent_title] => 'Transmitting encoded data on unreliable networks' [patent_app_type] => 1 [patent_app_number] => 7/458769 [patent_app_country] => US [patent_app_date] => 1989-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 3579 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/130/05130993.pdf [firstpage_image] =>[orig_patent_app_number] => 458769 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/458769
Transmitting encoded data on unreliable networks Dec 28, 1989 Issued
Array ( [id] => 2905333 [patent_doc_number] => 05210862 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-05-11 [patent_title] => 'Bus monitor with selective capture of independently occuring events from multiple sources' [patent_app_type] => 1 [patent_app_number] => 7/455667 [patent_app_country] => US [patent_app_date] => 1989-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 9889 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/210/05210862.pdf [firstpage_image] =>[orig_patent_app_number] => 455667 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/455667
Bus monitor with selective capture of independently occuring events from multiple sources Dec 21, 1989 Issued
Array ( [id] => 2862474 [patent_doc_number] => 05134618 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-07-28 [patent_title] => 'Method of testing connecting and/or switching devices and/or lines' [patent_app_type] => 1 [patent_app_number] => 7/455257 [patent_app_country] => US [patent_app_date] => 1989-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4237 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/134/05134618.pdf [firstpage_image] =>[orig_patent_app_number] => 455257 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/455257
Method of testing connecting and/or switching devices and/or lines Dec 21, 1989 Issued
07/454258 PACKET FRAMING USING CYCLIC REDUNDANCY CHECKING Dec 20, 1989 Abandoned
Array ( [id] => 2716357 [patent_doc_number] => 05068858 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-11-26 [patent_title] => 'Error correction capability varied with track location on a magnetic or optical disk' [patent_app_type] => 1 [patent_app_number] => 7/455197 [patent_app_country] => US [patent_app_date] => 1989-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 3491 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/068/05068858.pdf [firstpage_image] =>[orig_patent_app_number] => 455197 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/455197
Error correction capability varied with track location on a magnetic or optical disk Dec 20, 1989 Issued
Array ( [id] => 2840945 [patent_doc_number] => 05099480 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-03-24 [patent_title] => 'Method of testing bit errors in ISDN circuits' [patent_app_type] => 1 [patent_app_number] => 7/455958 [patent_app_country] => US [patent_app_date] => 1989-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 2122 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 225 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/099/05099480.pdf [firstpage_image] =>[orig_patent_app_number] => 455958 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/455958
Method of testing bit errors in ISDN circuits Dec 20, 1989 Issued
Array ( [id] => 2755640 [patent_doc_number] => 05003539 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-03-26 [patent_title] => 'Apparatus and method for encoding and decoding attribute data into error checking symbols of main data' [patent_app_type] => 1 [patent_app_number] => 7/455858 [patent_app_country] => US [patent_app_date] => 1989-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 20 [patent_no_of_words] => 24311 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/003/05003539.pdf [firstpage_image] =>[orig_patent_app_number] => 455858 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/455858
Apparatus and method for encoding and decoding attribute data into error checking symbols of main data Dec 14, 1989 Issued
Array ( [id] => 2832428 [patent_doc_number] => 05095482 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-03-10 [patent_title] => 'Method of and apparatus of individually monitoring transmission sections of a communications transmission link' [patent_app_type] => 1 [patent_app_number] => 7/449759 [patent_app_country] => US [patent_app_date] => 1989-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 3410 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 296 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/095/05095482.pdf [firstpage_image] =>[orig_patent_app_number] => 449759 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/449759
Method of and apparatus of individually monitoring transmission sections of a communications transmission link Dec 12, 1989 Issued
Array ( [id] => 2824783 [patent_doc_number] => 05123018 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-06-16 [patent_title] => 'Micropressor monitoring and resetting circuit' [patent_app_type] => 1 [patent_app_number] => 7/446138 [patent_app_country] => US [patent_app_date] => 1989-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 1282 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/123/05123018.pdf [firstpage_image] =>[orig_patent_app_number] => 446138 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/446138
Micropressor monitoring and resetting circuit Dec 4, 1989 Issued
Array ( [id] => 2744834 [patent_doc_number] => 05052001 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-09-24 [patent_title] => 'Multiple memory bank parity checking system' [patent_app_type] => 1 [patent_app_number] => 7/440558 [patent_app_country] => US [patent_app_date] => 1989-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2683 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 18 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/052/05052001.pdf [firstpage_image] =>[orig_patent_app_number] => 440558 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/440558
Multiple memory bank parity checking system Nov 21, 1989 Issued
Array ( [id] => 2791242 [patent_doc_number] => 05088092 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-02-11 [patent_title] => 'Width-expansible memory integrity structure' [patent_app_type] => 1 [patent_app_number] => 7/441128 [patent_app_country] => US [patent_app_date] => 1989-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2392 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/088/05088092.pdf [firstpage_image] =>[orig_patent_app_number] => 441128 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/441128
Width-expansible memory integrity structure Nov 21, 1989 Issued
Array ( [id] => 2890363 [patent_doc_number] => 05109382 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-04-28 [patent_title] => 'Method and apparatus for testing a memory' [patent_app_type] => 1 [patent_app_number] => 7/439838 [patent_app_country] => US [patent_app_date] => 1989-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2502 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/109/05109382.pdf [firstpage_image] =>[orig_patent_app_number] => 439838 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/439838
Method and apparatus for testing a memory Nov 20, 1989 Issued
Array ( [id] => 2699267 [patent_doc_number] => 05050171 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-09-17 [patent_title] => 'Burst error correction apparatus' [patent_app_type] => 1 [patent_app_number] => 7/444159 [patent_app_country] => US [patent_app_date] => 1989-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 4612 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/050/05050171.pdf [firstpage_image] =>[orig_patent_app_number] => 444159 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/444159
Burst error correction apparatus Nov 12, 1989 Issued
Array ( [id] => 2821877 [patent_doc_number] => 05086502 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-02-04 [patent_title] => 'Method of operating a data processing system' [patent_app_type] => 1 [patent_app_number] => 7/435138 [patent_app_country] => US [patent_app_date] => 1989-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 5341 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/086/05086502.pdf [firstpage_image] =>[orig_patent_app_number] => 435138 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/435138
Method of operating a data processing system Nov 12, 1989 Issued
Array ( [id] => 2683439 [patent_doc_number] => 05027358 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-06-25 [patent_title] => 'Switch-adjunct communications protocol' [patent_app_type] => 1 [patent_app_number] => 7/434389 [patent_app_country] => US [patent_app_date] => 1989-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2624 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/027/05027358.pdf [firstpage_image] =>[orig_patent_app_number] => 434389 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/434389
Switch-adjunct communications protocol Nov 8, 1989 Issued
07/434009 ERROR CORRECTION METHOD AND APPARATUS Nov 8, 1989 Abandoned
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