
Thomas Noland
Examiner (ID: 237)
| Most Active Art Unit | 2856 |
| Art Unit(s) | 2856, 2605, 2212, 2858, 2899 |
| Total Applications | 2707 |
| Issued Applications | 2417 |
| Pending Applications | 95 |
| Abandoned Applications | 197 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 2763486
[patent_doc_number] => 05072447
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-12-10
[patent_title] => 'Pattern injector'
[patent_app_type] => 1
[patent_app_number] => 7/433359
[patent_app_country] => US
[patent_app_date] => 1989-11-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 8
[patent_no_of_words] => 3438
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 9
[patent_words_short_claim] => 54
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/072/05072447.pdf
[firstpage_image] =>[orig_patent_app_number] => 433359
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/433359 | Pattern injector | Nov 7, 1989 | Issued |
Array
(
[id] => 2862190
[patent_doc_number] => 05090014
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-02-18
[patent_title] => 'Identifying likely failure points in a digital data processing system'
[patent_app_type] => 1
[patent_app_number] => 7/430168
[patent_app_country] => US
[patent_app_date] => 1989-11-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 4859
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 132
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/090/05090014.pdf
[firstpage_image] =>[orig_patent_app_number] => 430168
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/430168 | Identifying likely failure points in a digital data processing system | Oct 31, 1989 | Issued |
Array
(
[id] => 2719435
[patent_doc_number] => 05042034
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-08-20
[patent_title] => 'By-pass boundary scan design'
[patent_app_type] => 1
[patent_app_number] => 7/427549
[patent_app_country] => US
[patent_app_date] => 1989-10-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 3198
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 142
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/042/05042034.pdf
[firstpage_image] =>[orig_patent_app_number] => 427549
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/427549 | By-pass boundary scan design | Oct 26, 1989 | Issued |
Array
(
[id] => 2717966
[patent_doc_number] => 05062111
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-10-29
[patent_title] => 'Error check code generating device and transmission error detecting device'
[patent_app_type] => 1
[patent_app_number] => 7/426958
[patent_app_country] => US
[patent_app_date] => 1989-10-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 27
[patent_figures_cnt] => 33
[patent_no_of_words] => 8299
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 219
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/062/05062111.pdf
[firstpage_image] =>[orig_patent_app_number] => 426958
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/426958 | Error check code generating device and transmission error detecting device | Oct 25, 1989 | Issued |
| 07/419699 | HIGH SPEED TIMING GENERATOR | Oct 10, 1989 | Abandoned |
| 07/418926 | SIGNATURE ANALYSIS | Oct 5, 1989 | Abandoned |
Array
(
[id] => 2807648
[patent_doc_number] => 05144628
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-09-01
[patent_title] => 'Microprogram controller in data processing apparatus'
[patent_app_type] => 1
[patent_app_number] => 7/416977
[patent_app_country] => US
[patent_app_date] => 1989-10-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 18
[patent_no_of_words] => 2208
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 180
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/144/05144628.pdf
[firstpage_image] =>[orig_patent_app_number] => 416977
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/416977 | Microprogram controller in data processing apparatus | Oct 3, 1989 | Issued |
Array
(
[id] => 2892743
[patent_doc_number] => 05109505
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-04-28
[patent_title] => 'Semiconductor memory disk apparatus with backup device capable of being accessed immediately after power source is recovered'
[patent_app_type] => 1
[patent_app_number] => 7/413707
[patent_app_country] => US
[patent_app_date] => 1989-09-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 8
[patent_no_of_words] => 3389
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 138
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/109/05109505.pdf
[firstpage_image] =>[orig_patent_app_number] => 413707
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/413707 | Semiconductor memory disk apparatus with backup device capable of being accessed immediately after power source is recovered | Sep 27, 1989 | Issued |
Array
(
[id] => 2742444
[patent_doc_number] => 04998234
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-03-05
[patent_title] => 'Logarithmic servo error detection for optical disk drive'
[patent_app_type] => 1
[patent_app_number] => 7/412633
[patent_app_country] => US
[patent_app_date] => 1989-09-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 20
[patent_no_of_words] => 4908
[patent_no_of_claims] => 29
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 96
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/998/04998234.pdf
[firstpage_image] =>[orig_patent_app_number] => 412633
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/412633 | Logarithmic servo error detection for optical disk drive | Sep 24, 1989 | Issued |
Array
(
[id] => 2689670
[patent_doc_number] => 05067128
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-11-19
[patent_title] => 'Recorded data reading system'
[patent_app_type] => 1
[patent_app_number] => 7/411389
[patent_app_country] => US
[patent_app_date] => 1989-09-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3342
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 70
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/067/05067128.pdf
[firstpage_image] =>[orig_patent_app_number] => 411389
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/411389 | Recorded data reading system | Sep 21, 1989 | Issued |
Array
(
[id] => 2680672
[patent_doc_number] => 05048024
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-09-10
[patent_title] => 'Partitioned parity check and regeneration circuit'
[patent_app_type] => 1
[patent_app_number] => 7/403638
[patent_app_country] => US
[patent_app_date] => 1989-09-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 2887
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 123
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/048/05048024.pdf
[firstpage_image] =>[orig_patent_app_number] => 403638
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/403638 | Partitioned parity check and regeneration circuit | Sep 5, 1989 | Issued |
Array
(
[id] => 2716338
[patent_doc_number] => 05068857
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-11-26
[patent_title] => 'Error correction circuit'
[patent_app_type] => 1
[patent_app_number] => 7/401968
[patent_app_country] => US
[patent_app_date] => 1989-09-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 2562
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 191
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/068/05068857.pdf
[firstpage_image] =>[orig_patent_app_number] => 401968
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/401968 | Error correction circuit | Aug 31, 1989 | Issued |
Array
(
[id] => 2720286
[patent_doc_number] => 05018145
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-05-21
[patent_title] => 'IC tester'
[patent_app_type] => 1
[patent_app_number] => 7/401228
[patent_app_country] => US
[patent_app_date] => 1989-08-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 4050
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 125
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/018/05018145.pdf
[firstpage_image] =>[orig_patent_app_number] => 401228
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/401228 | IC tester | Aug 30, 1989 | Issued |
Array
(
[id] => 2840982
[patent_doc_number] => 05099482
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-03-24
[patent_title] => 'Apparatus for detecting uncorrectable error patterns when using Euclid\'s algorithm to decode Reed-Solomon (BCH) codes'
[patent_app_type] => 1
[patent_app_number] => 7/400447
[patent_app_country] => US
[patent_app_date] => 1989-08-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3280
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 127
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/099/05099482.pdf
[firstpage_image] =>[orig_patent_app_number] => 400447
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/400447 | Apparatus for detecting uncorrectable error patterns when using Euclid's algorithm to decode Reed-Solomon (BCH) codes | Aug 29, 1989 | Issued |
Array
(
[id] => 2770799
[patent_doc_number] => 05060230
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-10-22
[patent_title] => 'On chip semiconductor memory arbitrary pattern, parallel test apparatus and method'
[patent_app_type] => 1
[patent_app_number] => 7/400899
[patent_app_country] => US
[patent_app_date] => 1989-08-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 23
[patent_no_of_words] => 9483
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 97
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/060/05060230.pdf
[firstpage_image] =>[orig_patent_app_number] => 400899
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/400899 | On chip semiconductor memory arbitrary pattern, parallel test apparatus and method | Aug 29, 1989 | Issued |
Array
(
[id] => 2716255
[patent_doc_number] => 05068853
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-11-26
[patent_title] => 'Fail-safe apparatus for image forming apparatus'
[patent_app_type] => 1
[patent_app_number] => 7/399317
[patent_app_country] => US
[patent_app_date] => 1989-08-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 6
[patent_no_of_words] => 1877
[patent_no_of_claims] => 5
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[patent_words_short_claim] => 319
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/068/05068853.pdf
[firstpage_image] =>[orig_patent_app_number] => 399317
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/399317 | Fail-safe apparatus for image forming apparatus | Aug 27, 1989 | Issued |
Array
(
[id] => 2742960
[patent_doc_number] => 05040179
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-08-13
[patent_title] => 'High data rate BCH encoder'
[patent_app_type] => 1
[patent_app_number] => 7/396418
[patent_app_country] => US
[patent_app_date] => 1989-08-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 11
[patent_no_of_words] => 6682
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/040/05040179.pdf
[firstpage_image] =>[orig_patent_app_number] => 396418
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/396418 | High data rate BCH encoder | Aug 17, 1989 | Issued |
Array
(
[id] => 2831323
[patent_doc_number] => 05095421
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-03-10
[patent_title] => 'Transaction processing facility within an operating system environment'
[patent_app_type] => 1
[patent_app_number] => 7/395249
[patent_app_country] => US
[patent_app_date] => 1989-08-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[patent_no_of_words] => 6604
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/095/05095421.pdf
[firstpage_image] =>[orig_patent_app_number] => 395249
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/395249 | Transaction processing facility within an operating system environment | Aug 16, 1989 | Issued |
Array
(
[id] => 2744557
[patent_doc_number] => 05077744
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-12-31
[patent_title] => 'Method for error protection in telephone switching installations'
[patent_app_type] => 1
[patent_app_number] => 7/388097
[patent_app_country] => US
[patent_app_date] => 1989-08-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/077/05077744.pdf
[firstpage_image] =>[orig_patent_app_number] => 388097
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/388097 | Method for error protection in telephone switching installations | Jul 31, 1989 | Issued |
Array
(
[id] => 2865466
[patent_doc_number] => 05113398
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-05-12
[patent_title] => 'Self-healing data network and network node controller'
[patent_app_type] => 1
[patent_app_number] => 7/360024
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[pdf_file] => patents/05/113/05113398.pdf
[firstpage_image] =>[orig_patent_app_number] => 360024
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/360024 | Self-healing data network and network node controller | Jul 31, 1989 | Issued |