Thomas Noland

Array ( [id] => 2719425 [patent_doc_number] => 05042033 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-08-20 [patent_title] => 'RAM-implemented convolutional interleaver' [patent_app_type] => 1 [patent_app_number] => 7/361415 [patent_app_country] => US [patent_app_date] => 1989-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 5241 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/042/05042033.pdf [firstpage_image] =>[orig_patent_app_number] => 361415 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2754061 [patent_doc_number] => 05029166 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-07-02 [patent_title] => 'Method and apparatus for testing circuit boards' [patent_app_type] => 1 [patent_app_number] => 7/359679 [patent_app_country] => US [patent_app_date] => 1989-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 9733 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/029/05029166.pdf [firstpage_image] =>[orig_patent_app_number] => 359679 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2841036 [patent_doc_number] => 05099485 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-03-24 [patent_title] => 'Fault tolerant computer systems with fault isolation and repair' [patent_app_type] => 1 [patent_app_number] => 7/357626 [patent_app_country] => US [patent_app_date] => 1989-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 53 [patent_figures_cnt] => 56 [patent_no_of_words] => 20251 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/099/05099485.pdf [firstpage_image] =>[orig_patent_app_number] => 357626 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2824177 [patent_doc_number] => 05079771 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-01-07 [patent_title] => 'Bit and symbol timing recovery for sequential decoders' [patent_app_type] => 1 [patent_app_number] => 7/356048 [patent_app_country] => US [patent_app_date] => 1989-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4481 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/079/05079771.pdf [firstpage_image] =>[orig_patent_app_number] => 356048 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2699227 [patent_doc_number] => 05050169 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-09-17 [patent_title] => 'Method and apparatus for testing magnetic disks' [patent_app_type] => 1 [patent_app_number] => 7/355979 [patent_app_country] => US [patent_app_date] => 1989-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3048 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/050/05050169.pdf [firstpage_image] =>[orig_patent_app_number] => 355979 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2557410 [patent_doc_number] => RE033461 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-11-27 [patent_title] => 'Generation and diagnostic verification of complex timing cycles' [patent_app_type] => 2 [patent_app_number] => 7/353414 [patent_app_country] => US [patent_app_date] => 1989-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 1553 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/RE/033/RE033461.pdf [firstpage_image] =>[orig_patent_app_number] => 353414 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2626586 [patent_doc_number] => 04969117 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-11-06 [patent_title] => 'Chaining and hazard apparatus and method' [patent_app_type] => 1 [patent_app_number] => 7/348033 [patent_app_country] => US [patent_app_date] => 1989-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 5154 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/969/04969117.pdf [firstpage_image] =>[orig_patent_app_number] => 348033 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2719128 [patent_doc_number] => 05056092 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-10-08 [patent_title] => 'Computer system monitor and controller' [patent_app_type] => 1 [patent_app_number] => 7/345937 [patent_app_country] => US [patent_app_date] => 1989-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2827 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/056/05056092.pdf [firstpage_image] =>[orig_patent_app_number] => 345937 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2720268 [patent_doc_number] => 05018144 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-05-21 [patent_title] => 'Logic performance verification and transition fault detection' [patent_app_type] => 1 [patent_app_number] => 7/345758 [patent_app_country] => US [patent_app_date] => 1989-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3724 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/018/05018144.pdf [firstpage_image] =>[orig_patent_app_number] => 345758 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2869331 [patent_doc_number] => 05083264 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-01-21 [patent_title] => 'Process and apparatus for saving and restoring critical files on the disk memory of an electrostatographic reproduction machine' [patent_app_type] => 1 [patent_app_number] => 7/342008 [patent_app_country] => US [patent_app_date] => 1989-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 3235 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 222 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/083/05083264.pdf [firstpage_image] =>[orig_patent_app_number] => 342008 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2716319 [patent_doc_number] => 05068856 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-11-26 [patent_title] => 'Method and circuit for detecting data error' [patent_app_type] => 1 [patent_app_number] => 7/339758 [patent_app_country] => US [patent_app_date] => 1989-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 9629 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/068/05068856.pdf [firstpage_image] =>[orig_patent_app_number] => 339758 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2683349 [patent_doc_number] => 05027353 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-06-25 [patent_title] => 'Method for testing interconnections' [patent_app_type] => 1 [patent_app_number] => 7/339337 [patent_app_country] => US [patent_app_date] => 1989-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4127 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/027/05027353.pdf [firstpage_image] =>[orig_patent_app_number] => 339337 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2759207 [patent_doc_number] => 05031180 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-07-09 [patent_title] => 'Triple redundant fault-tolerant register' [patent_app_type] => 1 [patent_app_number] => 7/336499 [patent_app_country] => US [patent_app_date] => 1989-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 1991 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/031/05031180.pdf [firstpage_image] =>[orig_patent_app_number] => 336499 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2732058 [patent_doc_number] => 05025444 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-06-18 [patent_title] => 'Communications error detection system' [patent_app_type] => 1 [patent_app_number] => 7/334587 [patent_app_country] => US [patent_app_date] => 1989-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 1096 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 289 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/025/05025444.pdf [firstpage_image] =>[orig_patent_app_number] => 334587 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2596379 [patent_doc_number] => 04926427 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-05-15 [patent_title] => 'Software error detection apparatus' [patent_app_type] => 1 [patent_app_number] => 7/333752 [patent_app_country] => US [patent_app_date] => 1989-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1309 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/926/04926427.pdf [firstpage_image] =>[orig_patent_app_number] => 333752 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2760329 [patent_doc_number] => 05022028 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-06-04 [patent_title] => 'Software verification apparatus' [patent_app_type] => 1 [patent_app_number] => 7/330430 [patent_app_country] => US [patent_app_date] => 1989-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 3025 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/022/05022028.pdf [firstpage_image] =>[orig_patent_app_number] => 330430 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2744703 [patent_doc_number] => 05051996 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-09-24 [patent_title] => 'Built-in-test by signature inspection (bitsi)' [patent_app_type] => 1 [patent_app_number] => 7/328917 [patent_app_country] => US [patent_app_date] => 1989-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 7125 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/051/05051996.pdf [firstpage_image] =>[orig_patent_app_number] => 328917 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2708910 [patent_doc_number] => 04989209 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-01-29 [patent_title] => 'Method and apparatus for testing high pin count integrated circuits' [patent_app_type] => 1 [patent_app_number] => 7/328258 [patent_app_country] => US [patent_app_date] => 1989-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3602 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/989/04989209.pdf [firstpage_image] =>[orig_patent_app_number] => 328258 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2665531 [patent_doc_number] => 04972413 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-11-20 [patent_title] => 'Method and apparatus for high speed integrated circuit testing' [patent_app_type] => 1 [patent_app_number] => 7/327878 [patent_app_country] => US [patent_app_date] => 1989-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 2336 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/972/04972413.pdf [firstpage_image] =>[orig_patent_app_number] => 327878 [rel_patent_id] =>[rel_patent_doc_number] =>)