| Application number | Title of the application | Filing Date | Status |
|---|
Array
(
[id] => 3837436
[patent_doc_number] => 05790894
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-08-04
[patent_title] => 'Data processing with improved register bit structure'
[patent_app_type] => 1
[patent_app_number] => 8/713886
[patent_app_country] => US
[patent_app_date] => 1996-09-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 6
[patent_no_of_words] => 2660
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 160
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/790/05790894.pdf
[firstpage_image] =>[orig_patent_app_number] => 713886
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/713886 | Data processing with improved register bit structure | Sep 16, 1996 | Issued |
Array
(
[id] => 3818623
[patent_doc_number] => 05854937
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-12-29
[patent_title] => 'Method for reprogramming flash ROM in a personal computer implementing an EISA bus system'
[patent_app_type] => 1
[patent_app_number] => 8/712382
[patent_app_country] => US
[patent_app_date] => 1996-09-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 8
[patent_no_of_words] => 6669
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 124
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/854/05854937.pdf
[firstpage_image] =>[orig_patent_app_number] => 712382
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/712382 | Method for reprogramming flash ROM in a personal computer implementing an EISA bus system | Sep 10, 1996 | Issued |
Array
(
[id] => 3895435
[patent_doc_number] => 05826099
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-10-20
[patent_title] => 'Data processor having a computing element mounted on a microcontroller'
[patent_app_type] => 1
[patent_app_number] => 8/709683
[patent_app_country] => US
[patent_app_date] => 1996-09-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 15
[patent_no_of_words] => 12025
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 605
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/826/05826099.pdf
[firstpage_image] =>[orig_patent_app_number] => 709683
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/709683 | Data processor having a computing element mounted on a microcontroller | Sep 9, 1996 | Issued |
Array
(
[id] => 4070418
[patent_doc_number] => 05864705
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-01-26
[patent_title] => 'Optimized environments for virtualizing physical subsystems independent of the operating system'
[patent_app_type] => 1
[patent_app_number] => 8/698670
[patent_app_country] => US
[patent_app_date] => 1996-08-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 6
[patent_no_of_words] => 6585
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 126
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/864/05864705.pdf
[firstpage_image] =>[orig_patent_app_number] => 698670
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/698670 | Optimized environments for virtualizing physical subsystems independent of the operating system | Aug 14, 1996 | Issued |
Array
(
[id] => 3827031
[patent_doc_number] => 05832294
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-11-03
[patent_title] => 'Multiple-microprocessor module'
[patent_app_type] => 1
[patent_app_number] => 8/696320
[patent_app_country] => US
[patent_app_date] => 1996-08-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 16
[patent_no_of_words] => 3124
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 170
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/832/05832294.pdf
[firstpage_image] =>[orig_patent_app_number] => 696320
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/696320 | Multiple-microprocessor module | Aug 12, 1996 | Issued |
| 08/696113 | APPARATUS AND METHOD FOR MODIFYING INSTRUCTION LENGTH DECODING IN A COMPUTER PROCESSOR | Aug 11, 1996 | Abandoned |
Array
(
[id] => 3895159
[patent_doc_number] => 05765008
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-06-09
[patent_title] => 'Personal computer with riser card PCI and Micro Channel interface'
[patent_app_type] => 1
[patent_app_number] => 8/708102
[patent_app_country] => US
[patent_app_date] => 1996-08-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 2920
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 200
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/765/05765008.pdf
[firstpage_image] =>[orig_patent_app_number] => 708102
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/708102 | Personal computer with riser card PCI and Micro Channel interface | Aug 7, 1996 | Issued |
Array
(
[id] => 3755493
[patent_doc_number] => 05787256
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-07-28
[patent_title] => 'Apparatus and method for data communication between nodes'
[patent_app_type] => 1
[patent_app_number] => 8/692553
[patent_app_country] => US
[patent_app_date] => 1996-08-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 11
[patent_no_of_words] => 8359
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 182
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/787/05787256.pdf
[firstpage_image] =>[orig_patent_app_number] => 692553
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/692553 | Apparatus and method for data communication between nodes | Aug 5, 1996 | Issued |
Array
(
[id] => 3951405
[patent_doc_number] => 05872921
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-02-16
[patent_title] => 'System and method for a real time data stream analyzer and alert system'
[patent_app_type] => 1
[patent_app_number] => 8/687161
[patent_app_country] => US
[patent_app_date] => 1996-07-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 3328
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 151
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/872/05872921.pdf
[firstpage_image] =>[orig_patent_app_number] => 687161
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/687161 | System and method for a real time data stream analyzer and alert system | Jul 23, 1996 | Issued |
Array
(
[id] => 3662600
[patent_doc_number] => 05684979
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-11-04
[patent_title] => 'Method and means for initializing a page mode memory in a computer'
[patent_app_type] => 1
[patent_app_number] => 8/681415
[patent_app_country] => US
[patent_app_date] => 1996-07-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 14
[patent_no_of_words] => 5271
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 393
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/684/05684979.pdf
[firstpage_image] =>[orig_patent_app_number] => 681415
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/681415 | Method and means for initializing a page mode memory in a computer | Jul 22, 1996 | Issued |
Array
(
[id] => 3803372
[patent_doc_number] => 05822602
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-10-13
[patent_title] => 'Pipelined processor for executing repeated string instructions by halting dispatch after comparision to pipeline capacity'
[patent_app_type] => 1
[patent_app_number] => 8/685141
[patent_app_country] => US
[patent_app_date] => 1996-07-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 9
[patent_no_of_words] => 4476
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 233
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/822/05822602.pdf
[firstpage_image] =>[orig_patent_app_number] => 685141
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/685141 | Pipelined processor for executing repeated string instructions by halting dispatch after comparision to pipeline capacity | Jul 22, 1996 | Issued |
| 08/679744 | METHOD AND APPARATUS FOR SELF-SNOOPING DURING A BOUNDARY TRANSACTION | Jul 14, 1996 | Abandoned |
Array
(
[id] => 3812067
[patent_doc_number] => 05781775
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-07-14
[patent_title] => 'Parallel process scheduling method in a parallel computer and a processing apparatus for a parallel computer'
[patent_app_type] => 1
[patent_app_number] => 8/677984
[patent_app_country] => US
[patent_app_date] => 1996-07-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 12
[patent_no_of_words] => 12692
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 208
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/781/05781775.pdf
[firstpage_image] =>[orig_patent_app_number] => 677984
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/677984 | Parallel process scheduling method in a parallel computer and a processing apparatus for a parallel computer | Jul 9, 1996 | Issued |
Array
(
[id] => 3700580
[patent_doc_number] => 05696948
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-12-09
[patent_title] => 'Apparatus for determining round trip latency delay in system for preprocessing and delivering multimedia presentations'
[patent_app_type] => 1
[patent_app_number] => 8/673592
[patent_app_country] => US
[patent_app_date] => 1996-07-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 18
[patent_no_of_words] => 11436
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 239
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/696/05696948.pdf
[firstpage_image] =>[orig_patent_app_number] => 673592
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/673592 | Apparatus for determining round trip latency delay in system for preprocessing and delivering multimedia presentations | Jun 30, 1996 | Issued |
Array
(
[id] => 3745929
[patent_doc_number] => 05694612
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-12-02
[patent_title] => 'Self-timed interface for a network of computer processors interconnected in parallel'
[patent_app_type] => 1
[patent_app_number] => 8/669669
[patent_app_country] => US
[patent_app_date] => 1996-06-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 8
[patent_no_of_words] => 4338
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 197
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/694/05694612.pdf
[firstpage_image] =>[orig_patent_app_number] => 669669
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/669669 | Self-timed interface for a network of computer processors interconnected in parallel | Jun 23, 1996 | Issued |
Array
(
[id] => 3803505
[patent_doc_number] => 05822609
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-10-13
[patent_title] => 'Processing circuit for performing a convolution computation'
[patent_app_type] => 1
[patent_app_number] => 8/666767
[patent_app_country] => US
[patent_app_date] => 1996-06-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2459
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 29
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/822/05822609.pdf
[firstpage_image] =>[orig_patent_app_number] => 666767
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/666767 | Processing circuit for performing a convolution computation | Jun 18, 1996 | Issued |
Array
(
[id] => 4037935
[patent_doc_number] => 05926642
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-07-20
[patent_title] => 'RISC86 instruction set'
[patent_app_type] => 1
[patent_app_number] => 8/649983
[patent_app_country] => US
[patent_app_date] => 1996-05-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 16
[patent_no_of_words] => 38067
[patent_no_of_claims] => 38
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 248
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/926/05926642.pdf
[firstpage_image] =>[orig_patent_app_number] => 649983
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/649983 | RISC86 instruction set | May 15, 1996 | Issued |
Array
(
[id] => 3857794
[patent_doc_number] => 05745677
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-04-28
[patent_title] => 'Method for reprogramming a communicaton unit\'s access to a wireless communication system'
[patent_app_type] => 1
[patent_app_number] => 8/647075
[patent_app_country] => US
[patent_app_date] => 1996-05-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 2528
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 120
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/745/05745677.pdf
[firstpage_image] =>[orig_patent_app_number] => 647075
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/647075 | Method for reprogramming a communicaton unit's access to a wireless communication system | May 7, 1996 | Issued |
Array
(
[id] => 3661968
[patent_doc_number] => 05606715
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-02-25
[patent_title] => 'Flexible reset configuration of a data processing system and method therefor'
[patent_app_type] => 1
[patent_app_number] => 8/639461
[patent_app_country] => US
[patent_app_date] => 1996-04-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 8
[patent_no_of_words] => 7612
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 191
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/606/05606715.pdf
[firstpage_image] =>[orig_patent_app_number] => 639461
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/639461 | Flexible reset configuration of a data processing system and method therefor | Apr 28, 1996 | Issued |
Array
(
[id] => 3635783
[patent_doc_number] => 05594870
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-01-14
[patent_title] => 'Adapter between non-CTOS host and CTOS network'
[patent_app_type] => 1
[patent_app_number] => 8/637465
[patent_app_country] => US
[patent_app_date] => 1996-04-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 19
[patent_no_of_words] => 3606
[patent_no_of_claims] => 28
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 272
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/594/05594870.pdf
[firstpage_image] =>[orig_patent_app_number] => 637465
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/637465 | Adapter between non-CTOS host and CTOS network | Apr 24, 1996 | Issued |